Boots – shoes – and leggings
Patent
1982-12-23
1987-04-28
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 916, G06F 700
Patent
active
046619011
ABSTRACT:
A microprogrammed data processor in which the average processing speed is significantly enhanced by very rapidly processing system-initiated control operations using multiplexed programmable logic arrays. A wide input system encoding programmable logic array (270) responds to input signals which instruct system-initiated control operations, such as interrupts, power failure shut-down operations, system reset operations, ets., to produce internal exception condition opcodes. These opcodes are applied to inputs of a plurality of system decode programmable logic arrays (251-254) which, in response to the opcodes, generate sequences of microwords for executing the system-initiated control operations. The system decode programmable logic arrays (251-254) are activated sequentially and cyclically to generate the sequences of microwords used to carry out each of the control operations. The outputs of the system decode programmable logic arrays are multiplexed onto two data buses (214, 218), and the microwords on the two data buses (214, 218) are alternately decoded to produce control point signals used to directly control the operations of internal processor operational elements such as the arithmetic logic unit, registers, counters and the like.
REFERENCES:
patent: 3959774 (1976-05-01), Mead
patent: 4173041 (1979-10-01), Dvorak et al.
patent: 4195352 (1980-03-01), Tu et al.
patent: 4357678 (1982-11-01), Davis
patent: 4482953 (1984-11-01), Burke
Dorsey Daniel K.
International Business Machines - Corporation
Shaw Gareth D.
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