Microprocessor configured to detect a branch to a DSP routine an

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395580, 39580035, G06F 944

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active

058929347

ABSTRACT:
A microprocessor configured to detect subroutine call instructions having a target address indicative of a DSP function is provided. The detection of such instructions may be performed, for example, in an instruction decode unit within the microprocessor. Subroutine call instructions detected in this manner are routed to a digital signal processor coupled near the microprocessor or possibly integrated into the microprocessor. The microprocessor may be configured to store an indication that the DSP is enabled. If the DSP is not enabled, then the microprocessor executes the original routines stored at the target address of the instruction. Although the routines may not be as efficient in performing the DSP function, the program employing the function may still operate properly in the absence of the DSP. In this manner, a computer system may initially operate without the DSP included. If a user later decides to upgrade the computer system with a DSP, then the microprocessor may dispatch DSP functions to the DSP. Until the upgrade occurs, the microprocessor may execute the functions.

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