Microprocessor circuits, systems, and methods for speculatively

Details Microprocessor circuits, systems, and methods for speculatively Microprocessor circuits, systems, and methods for speculatively

1997-12-30

1999-06-01

Maung, Zarni

395585, G06F 938

Patent

active

059095660

ABSTRACT:
A method of operating a microprocessor (12) having an on-chip storage resource (100a). The method first receives a data fetching instruction into an instruction pipeline (38) at a first time. The instruction pipeline has a preliminary stage (40), a plurality of stages (42 through 46) following the preliminary stage, and an execution stage (48) following the plurality of stages. The step of receiving a data fetching instruction at the first time comprises receiving the data fetching instruction in the preliminary stage. The method second performs various steps, including fetching a first data quantity (MRU TARGET DATA) for the data fetching instruction to complete the execution stage of the pipeline, completing the execution stage in connection with the data fetching instruction using the first data quantity, and storing the first data quantity in the on-chip storage resource. The method third receives the data fetching instruction into the preliminary stage at a second time (108). In response, the method fourth issues a prefetch request (110) for a prefetched data quantity for the data fetching instruction to complete the execution stage of the pipeline. The method fifth completes the execution stage (122 or 132) in connection with the data fetching instruction using a predetermined data quantity. The predetermined data quantity is selected from a group of quantities (TARGET DATA) comprising the first data quantity in the on-chip resource and the prefetched data quantity.

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