Microprocessor capable of automatically performing multiple bus

Details Microprocessor capable of automatically performing multiple bus Microprocessor capable of automatically performing multiple bus

1982-07-07

1986-04-01

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1100

Patent

active

045802130

ABSTRACT:
A microprocessor is disclosed having a bus controller which is capable of automatically performing multiple bus cycles in response to a multi-cycle signal received from the control unit. The bus controller includes means for automatically incrementing the access address provided by the control unit, and for controlling the transfer of the data between the bus and respective destinations in the control units.

REFERENCES:
patent: 4348722 (1982-09-01), Gunter et al.

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