Excavating
Patent
1991-10-08
1994-05-24
Beausoliel, Jr., Robert W.
Excavating
371 212, G01R 3128, G06F 1100
Patent
active
053155998
ABSTRACT:
A certain number of high bits of each sample (12 bits) supplied by an analog-to-digital converter is used as the address of a comparison zone of a RAM associated with the microprocessor of the device. In this comparison zone the result of comparison of this sample with a predetermined number of thresholds has previously been recorded. The sample (12 bits) and associated comparison result (4 bits) are stored in a storage zone of the RAM for subsequent processing by the microprocessor. This simultaneous acquisition of a sample and of the prerecorded result of comparison of this sample with the thresholds minimizes the time devoted by the microprocessor to data acquisition.
REFERENCES:
patent: 4319355 (1982-03-01), Mollier
patent: 4760575 (1988-07-01), Watanabe
patent: 4974226 (1990-11-01), Fujimori
Patent Abstracts of Japan, vol. 8, No. 139 (E-253)(1576), Jun. 28, 1984.
IBM Technical Disclosure Bulletin, vol. 30, No. 5, Nov. 1987.
IBM Technical Disclosure Bulletin, vol. 31, No. 8, Jan. 1989.
Chaboud Gilbert
Kalenine Yvan
Beausoliel, Jr. Robert W.
Merlin Gerin
Snyder Glenn
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