Microprocessor

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G06F 930

Patent

active

046369457

ABSTRACT:
In a microprocessor including a data memory device a simple checking circuit is provided for reading out the data onto a data bus line to check whether the data must be debugged. The checking circuit reads out data stored in an accumulator, register, etc. onto the data bus line. The checking circuit allows the microprocessor to operate normally in the absence of a checking signal and respectively connects the accumulator, register, or RAM outputs to the data bus in accordance with the timing signals from the microprocessor timing signal generator in the presence of the checking signal. A program counter of the microprocessor is also inhibited from incrementing when the checking signal is present.

REFERENCES:
patent: 4482953 (1984-11-01), Burke

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