Micron and submicron patterning without using a lithographic mas

Fishing – trapping – and vermin destroying

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437072, H01L 21316, H01L 21318, H01L 2132

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active

048124184

ABSTRACT:
An electronic process is provided for creating a small dimensioned pattern in a semiconductor device. In one embodiment, the pattern functions to electrically separate two areas of the substrate by less than a micron. A lithographic mask which does not have to utilize dimensions as small as those being formed on the semiconductor device is used to form a predetermined pattern with at least one separation region by irradiating and developing a photoresist material. A layer of buffer material below the photoresist material reacts with a reactive ion etch to form a separation area with sloping sides comprised of polymer filaments produced from the reaction. The sloped sides of the separation region provide a separation dimension in the substrate of the semiconductor structure which is significantly smaller than a corresponding dimension required to be implemented on the lithographic mask.

REFERENCES:
patent: 4373965 (1983-02-01), Smigelski
patent: 4505026 (1985-03-01), Bohr et al.
patent: 4659427 (1987-04-01), Barry et al.
patent: 4692992 (1987-09-01), Hsu
patent: 4702795 (1987-10-01), Douglas
patent: 4707218 (1987-11-01), Giammarco et al.
patent: 4738683 (1988-04-01), Blanchard et al.

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