Microfluidic channel fabrication method

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Groove formation

Reexamination Certificate

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C204S450000, C204S451000, C204S601000

Reexamination Certificate

active

06210986

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention pertains generally to microfluidic structures and particularly to a microchannel structure and a method for fabricating the microchannel structure on a substrate.
The microscale devices that constitute a microfluidic system typically consist of a plurality of grooves, or microchannels, and chambers etched or molded in a substrate that can be silicon, plastic, quartz, glass, or plastic. The size, shape and complexity of these microchannels and their interconnections influence the limits of a microsystem's functionality and capabilities. In turn, the size, shape and complexity of microchannels and structures that can be used in microfluidic systems depend on the materials used and the fabrication processes available for those materials. Typical system fabrication includes making trenches in a conducting material (silicon) or in a non-conducting substrate (e.g., glass or plastic) and converting them to channels by bonding a cover plate to the substrate. The typical overall channel sizes range from about 5-100 &mgr;m wide and 5-100 &mgr;m deep.
For example, U.S. Pat. Nos. 5,885,470 teaches a microfluidic device having application in chemistry, biotechnology, and molecular biology that provides precise control of fluids by forming various grooves or channels and chambers in a polymeric substrate. The process of forming channels can include wet chemical etching, photolithographic techniques, controlled vapor deposition, and laser drilling into a substrate.
U.S. Pat. No. 5,571,410 discloses a miniaturized analysis system comprising microstructures fabricated on a non-silicon or SiO
2
substrate by laser ablation.
U.S. Pat. No. 5,580,523 relates to a method and apparatus for continuous synthesis of chemical compounds under controlled and regulated conditions comprising microreactors. The microreactors are fabricated by photolithographic methods, wherein a photoresist is applied to the upper surface of a Si or SiO
2
substrate and the microreactor and associated flow channels are etched into the substrate by an appropriate reagent.
Similar apparatus and methods of fabricating microfluidic devices are also taught and disclosed in U.S. Pat. Nos. 5,858,195, 5,126,022, 4,891,120, 4,908,112, and 5,750,015 and International PCT Application WO 98/22811.
As exemplified by the foregoing, prior art teaches typical system fabrication that includes making trenches
125
in a substrate
110
and converting the trenches to channels by bonding a cover plate
120
to the substrate, as illustrated in plan view in
FIG. 1
a
and in cross-section in
FIG. 1
b
. Typical overall channel sizes are on the order of 5-100 &mgr;m wide and 5-100 &mgr;m deep. However, there are significant limitations inherent in these fabrication methods, particularly with regard to aspect ratio (the ratio of channel height to width), the slope of the channel walls, and system channel dimensions, generally. By way of example, the most widely used processes include isotropic wet chemical etching of glass or silica and molding of plastics. Isotropic etching produces channels that re significantly wider at the top than at the bottom, thus limiting channel aspect ratios. In techniques requiring molding or stamping, the aspect ratio is limited by the tool removal step. Large height-to-width ratios increase the mold adhesion transverse to the molding force direction.
Due to the favorable scaling laws for electro-osmosis and electrophoresis, many microfluidic structures are designed to produce and guide electrokinetically-driven flows. Electrokinetically-driven flows require application of high voltages to a fluid contained within the patterned microchannels. Consequently, successful electtokinetic system operation requires that the substrate channels be much less electrically conductive than the liquid contained therein. While microfluidic systems can be produced directly in electrically insulating materials, the clear advantages of silicon micromachining technologies as applied to microfluidic systems have been recognized. However, a significant obstacle to the development of silicon-based Microsystems is the inability to operate at voltages required for electrokinetic separation or pumping operations (i.e., in the kV range). Prior art approaches to making silicon devices that can be used in this voltage range attempt to reduce electrical current flow through the silicon substrate by depositing insulating layers, such as SiO
2
and SiN
x
, with minimal success. Very high failure rates occur because extremely high performance is required of the insulating layer. By way of example, consider the voltage gradient across an insulating layer that coats a silicon channel that contains a liquid with a voltage applied between the two ends of the channel. For successful operation, this voltage gradient must not exceed the dielectric breakdown voltage of the SiO
2
insulator layer. The breakdown potential gradient of pure SiO
2
(quartz) is about 7×10
6
V/cm. The application of 1000 V (a modest voltage for electrokinetic separation or pumping operations) to a channel in a grounded silicon microfluidic system produces a voltage gradient across a 1 &mgr;m thick SiO
2
layer as large as 1×10
7
V/cm. Therefore, we require an insulator having a thickness of about 10 &mgr;m to prevent dielectric breakdown from the 1000 V applied to the channel. This value of thickness of the SiO
2
layer assumes no pores or other defects, such as impurities, are present in the insulating layer through which current can leak. Deposition of such high quality or “defect free” layers is extremely challenging for standard thin film deposition tools. Consequently, much thicker layers must be used to withstand the larger voltages desired for electrokinetic separations or pumping applications. As a result, these coating methods place fundamental limits on the minimum size features that can be incorporated into a microfluidic system. Additionally, a high demand is placed on the structural integrity of the insulating layers because they are in contact with the fluids contained in the channels. The insulator layer integrity requirements are generally more stringent for fluidic systems than for electronics applications because the electrically charged liquid and electrolytes, by their inherent nature, will find any imperfection in the insulator layer and short circuit the system through the bulk silicon substrate. Additionally, the chemical nature of the fluids can vary over a range of pH. On the microscopic scale chemical reactions (e.g., attack of SiO
2
by base) can actually dissolve or produce imperfections in the insulator layers if they are not sufficiently robust.
Sealing the top plate, or cover, onto the etched substrate remains a significant practical problem in the fabrication of microfluidic systems having channels etched into the substrate. Unfortunately, while silica-based materials (crystalline and amorphous silicon dioxide and glasses) generally have good optical properties and chemical resistance and are good electrical insulators, they all have high melting temperatures. As a result, glass channel sealing processes require heating to >600° C. For quartz, a temperature in excess of 1100° C. is needed. High temperature processes limit the use of many useful designs and materials that one might want to include in a microfluidic device. For example, it is difficult for metal electrodes or surface coatings to survive the sealing process due to differential thermal expansion, or even complete evaporation, at the temperatures required for quartz bonding.
For many chemical analysis applications, such as chromatographic separations, it is necessary to have channels packed with a porous material. The porous material can either be placed into a previously fabricated channel or, preferably, the porous material can be microfabricated directly into the channel. Processes have been developed for etching silicon with a very high anisotropy and near normal sidewalls. For example, it is now possible to etch

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