Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including means for establishing a depletion region...
Reexamination Certificate
2000-03-10
2003-04-01
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including means for establishing a depletion region...
C257S500000, C257S499000
Reexamination Certificate
active
06541839
ABSTRACT:
TECHNICAL FIELD
This invention concerns a microelectronic structure comprising:
at least one low voltage element and one high voltage element, and
means of protection designed to protect the low voltage element against the unwanted effects generated at the high voltage element, and more particularly from the effects of high voltage element switching.
This invention applies in particular to the field of power electronics, and more specifically to smart power integrated circuit.
PRIOR STATE OF THE ART
With such circuits, there is a problem of protection of the low voltage element(s) (generally control elements, for instance logic control circuits) and more specifically against transient phenomena resulting from the switching of the high voltage element(s) (that are power elements).
During the switching of a high-voltage element, this element goes through considerable voltage and current variations: the voltage may vary by several hundreds of volts and the current by several amperes.
This generates spurious current and voltage pulses throughout the circuit.
These pulses are liable to interfere with the low-voltage element or elements that are far more sensitive to such pulses than is a high-voltage element.
There are several known solutions for resolving this problem.
The first solution consists in moving the low-voltage element or elements away from the high-voltage element or elements.
A solution like this includes a drawback: it requires the use of a large surface area of semi-conductor material.
A second solution consists in limiting the voltage and operating current of the high-voltage element or elements, detrimental to circuit performance.
A third solution consists in isolating the low voltage element or elements in electrically insulating wells, involving a drawback because the circuit manufacturing process becomes complex.
A fourth solution consists in forming low resistance areas (highly doped semi-conductor areas) under the low-voltage element or elements so as to “drain off” the unwanted current obtained from the substrate.
This fourth solution is illustrated in FIG.
1
.
FIG. 1
is a transversal schematic sectional view of a power circuit comprising:
a low voltage zone
2
with one or several low voltage elements, and
a high voltage zone
4
including one or several high voltage elements.
These zones
2
and
4
are formed on the upper surface of a semiconductor substrate
6
.
A contact point
8
is provided on the underside of the substrate
6
for the input high current and the establishing of high voltage.
FIG. 1
also shows a contact point
10
designed for the output of high current from high voltage zone
4
.
In conformity with the fourth solution mentioned above, a highly doped zone
12
is formed under the low voltage zone
2
and forms a screen protecting it.
The arrows
14
depicted in
FIG. 1
represent the current generated in the substrate during the operation of the high voltage zone.
Arrow
16
shows spurious power current captured by the highly doped zone
12
.
FIG. 1
also reveals a contact point
17
provided for the output of spurious current from this highly doped zone
12
.
Highly doped zone
12
is a buried zone obtained by surface doping, then epitaxial doping over the entire section of the semiconductor material (generally silicon) on which the circuit is formed.
The fourth solution involves several drawbacks:
to be implemented, it requires epitaxia, a costly and tricky process,
epitaxia takes place at high temperature and doping diffusion occurs,
the architecture of the circuit becomes complex because the high voltage element(s) must be produced in material resulting from epitaxia.
In addition, the establishing of contact with the highly doped buried area is always more difficult to obtain when the area is more deeply buried.
OUTLINE OF THE INVENTION
The purpose of this invention is to remedy the aforementioned drawback.
Its purpose is to obtain a microelectronic structure comprising:
at least one low voltage element and at least one high voltage element formed on a semiconductor substrate including a first type of doping and,
means of protection to protect the low voltage element against the unwanted effects generated at the high voltage element,
this structure is characterized in that the means of protection include:
at least one channel passing through the low voltage element;
a semiconductor zone which has a second type of doping opposed to the first type of doping and which, at the least, encloses the walls of the channel or channels so that such channel or channels drain/drains off the unwanted current generated at the high voltage element and
a contact point in this area which provides for the output of unwanted current.
According to an advantageous embodiment, the channel or channels will penetrate into the substrate.
According to a specific embodiment, the voltage element includes a semiconductor well having the second type of doping, and each channel is formed by this well and enters into the substrate.
The fact that the channels penetrate into the substrate provides more efficient drainage of the unwanted current (drainage of the areas remote from the low voltage active elements to minimize the unwanted effects on the low voltage element).
In an initial embodiment of the structure of the invention, this zone is part of the substrate and is doped by a doping agent of a type different from the remainder of the substrate, all around the channel.
Preferably, the contact point in this part is obtained by a conductive deposit which partially or totally fills the channel.
According to a second embodiment in the structure of the invention, this area includes a semiconductor material of the doping type, differing from that of the substrate, deposited in the channel, which material entirely or partially fills the channel and the part of the substrate near the walls of the channel through which the doping agent was diffused.
Preferably, the contact point in this second embodiment is obtained by a conductive deposit on said material, which conductive deposit is liable to complete the filling of the channel.
It is noteworthy that the conductive deposit (whatever the embodiment involved) is a means of ensuring that the contact point cannot cover said zone entirely.
According to a specific embodiment of the microelectronic structure referred to in the invention, the channels enclose at least one electronic component forming part of the low voltage element.
In the microelectronic structure referred to in the invention, at least one channel can be continuous or, to the contrary, discontinuous.
Preferably, the depth of each channel beyond the low voltage element will range from a few micrometers to ten micrometers or so.
Also preferably, the width of each channel is around 2 &mgr;m to 5 &mgr;m.
Preferably, the substrate will be of silicon and the material for filling the channels can be doped polysilicon with doping opposite to that of the substrate silicon.
As an alternative, this material can be doped glass with doping opposed to that of the substrate silicon.
In this well, the contact point can be formed by doped or undoped polysilicon.
The purpose of this invention is also a process for the protection of a microelectronic structure comprising at least one low voltage element and at least one high voltage element, formed on a semiconductor substrate featuring an initial type of doping, which process is characterized in that it includes the following steps:
a protective coat is formed at the surface of the structure,
at least one channel is formed through the protective coat and the low voltage element,
a semiconductor area is formed having a second type of doping, opposed to the first type, at least around the walls of the channel or channels so that the channel(s) will drain off the spurious current generated at the high voltage element, and
a contact point is formed in said zone, which contact point provides for the output of spurious current.
In a specific initial embodiment, this zone is obtained by installing, within the substrate and throu
Commissariat a l'Energie Atomique
Flynn Nathan J.
Krebs Robert E.
Mondt Johannes
Thelen Reid & Priest LLP
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