Microelectronic packages and methods therefor

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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C438S110000, C438S112000, C257S678000, C257S686000, C257SE21499

Reexamination Certificate

active

08058101

ABSTRACT:
A method of making a microelectronic assembly includes providing a microelectronic package having a substrate, a microelectronic element overlying the substrate and at least two conductive elements projecting from a surface of the substrate, the at least two conductive elements having surfaces remote from the surface of the substrate. The method includes compressing the at least two conductive elements so that the remote surfaces thereof lie in a common plane, and after the compressing step, providing an encapsulant material around the at least two conductive elements for supporting the microelectronic package and so that the remote surfaces of the at least two conductive elements remain accessible at an exterior surface of the encapsulant material.

REFERENCES:
patent: 3900153 (1975-08-01), Beerwerth et al.
patent: 4695870 (1987-09-01), Patraw
patent: 4716049 (1987-12-01), Patraw
patent: 4804132 (1989-02-01), Difrancesco
patent: 4902600 (1990-02-01), Tamagawa et al.
patent: 4924353 (1990-05-01), Patraw
patent: 4975079 (1990-12-01), Beaman et al.
patent: 4982265 (1991-01-01), Watanabe et al.
patent: 5083697 (1992-01-01), Difrancesco
patent: 5138438 (1992-08-01), Masayuki et al.
patent: 5148265 (1992-09-01), Khandros et al.
patent: 5148266 (1992-09-01), Khandros et al.
patent: 5186381 (1993-02-01), Kim
patent: 5189505 (1993-02-01), Bartelink
patent: 5196726 (1993-03-01), Nishiguchi et al.
patent: 5214308 (1993-05-01), Nishiguchi et al.
patent: 5222014 (1993-06-01), Lin
patent: 5340771 (1994-08-01), Rostoker
patent: 5397997 (1995-03-01), Tuckerman et al.
patent: 5455390 (1995-10-01), DiStefano et al.
patent: 5518964 (1996-05-01), DiStefano et al.
patent: 5615824 (1997-04-01), Fjelstad et al.
patent: 5656550 (1997-08-01), Tsuji et al.
patent: 5659952 (1997-08-01), Kovac et al.
patent: 5679977 (1997-10-01), Khandros et al.
patent: 5731709 (1998-03-01), Pastore et al.
patent: 5736780 (1998-04-01), Murayama
patent: 5802699 (1998-09-01), Fjelstad et al.
patent: 5811982 (1998-09-01), Beaman et al.
patent: 5854507 (1998-12-01), Miremadi et al.
patent: 5912505 (1999-06-01), Itoh et al.
patent: 5971253 (1999-10-01), Gilleo et al.
patent: 5973391 (1999-10-01), Bischoff et al.
patent: 5980270 (1999-11-01), Fjelstad et al.
patent: 6032359 (2000-03-01), Carroll
patent: 6038136 (2000-03-01), Weber
patent: 6052287 (2000-04-01), Palmer et al.
patent: 6054756 (2000-04-01), DiStefano et al.
patent: 6077380 (2000-06-01), Hayes et al.
patent: 6124546 (2000-09-01), Hayward et al.
patent: 6177636 (2001-01-01), Fjelstad
patent: 6194250 (2001-02-01), Melton et al.
patent: 6202297 (2001-03-01), Faraci et al.
patent: 6258625 (2001-07-01), Brofman et al.
patent: 6332270 (2001-12-01), Beaman et al.
patent: 6358627 (2002-03-01), Benenati et al.
patent: 6362525 (2002-03-01), Rahim
patent: 6458411 (2002-10-01), Goossen et al.
patent: 6495914 (2002-12-01), Sekine et al.
patent: 6507104 (2003-01-01), Ho et al.
patent: 6514847 (2003-02-01), Ohsawa et al.
patent: 6515355 (2003-02-01), Jiang et al.
patent: 6522018 (2003-02-01), Tay et al.
patent: 6545228 (2003-04-01), Hashimoto
patent: 6550666 (2003-04-01), Chew et al.
patent: 6555918 (2003-04-01), Masuda et al.
patent: 6560117 (2003-05-01), Moon
patent: 6573458 (2003-06-01), Matsubara et al.
patent: 6578754 (2003-06-01), Tung
patent: 6624653 (2003-09-01), Cram
patent: 6647310 (2003-11-01), Yi et al.
patent: 6902869 (2005-06-01), Appelt et al.
patent: 6930256 (2005-08-01), Huemoeller et al.
patent: 6987032 (2006-01-01), Fan et al.
patent: 7045884 (2006-05-01), Standing
patent: 7067911 (2006-06-01), Lin et al.
patent: 7176559 (2007-02-01), Ho et al.
patent: 7185426 (2007-03-01), Hiner et al.
patent: 7215033 (2007-05-01), Lee et al.
patent: 7233057 (2007-06-01), Hussa
patent: 7323767 (2008-01-01), James et al.
patent: 7372151 (2008-05-01), Fan et al.
patent: 7485562 (2009-02-01), Chua et al.
patent: 7633765 (2009-12-01), Scanlan et al.
patent: 7671457 (2010-03-01), Hiner et al.
patent: 7671459 (2010-03-01), Corisis et al.
patent: 7675152 (2010-03-01), Gerber et al.
patent: 2002/0125571 (2002-09-01), Corisis et al.
patent: 2002/0153602 (2002-10-01), Tay et al.
patent: 2003/0057544 (2003-03-01), Nathan et al.
patent: 2003/0124767 (2003-07-01), Lee et al.
patent: 2003/0164540 (2003-09-01), Lee et al.
patent: 2004/0036164 (2004-02-01), Koike et al.
patent: 2004/0038447 (2004-02-01), Corisis et al.
patent: 2004/0075164 (2004-04-01), Pu et al.
patent: 2004/0090756 (2004-05-01), Ho et al.
patent: 2004/0110319 (2004-06-01), Fukutomi et al.
patent: 2004/0160751 (2004-08-01), Inagaki et al.
patent: 2004/0262734 (2004-12-01), Yoo
patent: 2005/0035440 (2005-02-01), Mohammed
patent: 2005/0082664 (2005-04-01), Funaba et al.
patent: 2005/0116326 (2005-06-01), Haba et al.
patent: 2005/0173805 (2005-08-01), Damberg et al.
patent: 2005/0181544 (2005-08-01), Haba et al.
patent: 2005/0181655 (2005-08-01), Haba et al.
patent: 2005/0285246 (2005-12-01), Haba et al.
patent: 2007/0148822 (2007-06-01), Haba et al.
patent: 2008/0284045 (2008-11-01), Gerber et al.
patent: 2008/0315385 (2008-12-01), Gerber et al.
patent: 2010/0232129 (2010-09-01), Haba et al.
patent: 920058 (1999-06-01), None
patent: 62-68015 (1994-09-01), None
patent: 2003122611 (2003-04-01), None
patent: 2003-174124 (2003-06-01), None
patent: 2003307897 (2003-10-01), None
patent: 2004327856 (2004-11-01), None
patent: 2004343030 (2004-12-01), None
patent: 2003377641 (2005-06-01), None
patent: 2005142378 (2005-06-01), None
patent: 2003426392 (2005-07-01), None
patent: 2005183880 (2005-07-01), None
patent: 02/13256 (2002-02-01), None
Neo-Manhattan Technology, A Novel HDI Manufacturing Process, “High-Density Interconnects for Advanced Flex Substrates & 3-D Package Stacking,” IPC Flex & Chips Symposium, Tempe, AZ, Feb. 11-12, 2003.
North Corporation, “Processed Intra-layer Interconnection Material for PWBs [Etched Copper Bump with Copper Foil],” NMBI™, Version 2001.6.
Kim et al., “Application of Through Mold Via (TMV) as PoP base package”, 6 pages (2008).
International Search Report, PCT/US2005/039716, Apr. 5, 2006.
JP Pub. 2004-327856 “Method for manufacturing wiring circuit board and method for manufacturing semiconductor integrated circuit device using the wiring circuit board”, Kimiyoshi et al. (Nov. 18, 2004).
Office Action from U.S. Appl. No. 12/769,930 mailed May 5, 2011.

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