Microelectronic package including a polymer encapsulated die, an

Details Microelectronic package including a polymer encapsulated die, an Microelectronic package including a polymer encapsulated die, an

1997-05-19

1999-04-20

Nguyen, Tuan H.

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

H01L 2144, H01L 2148

Patent

active

058952292

ABSTRACT:
A microelectronic package (10) is formed and includes an integrated circuit die (12) attached to a substrate (14) by a plurality of solder bump interconnections (16) to form a preassembly (18). The integrated circuit die (12) has an active face (20) that faces the substrate (14) and is spaced apart therefrom by a gap (22). The integrated circuit die (12) also includes a back face (24) opposite the active face (20). The substrate (14) includes a die attach region (26) and a surrounding region (28) about the integrated circuit die (12). The solder bump interconnections (16) extend across the gap (22) and connect the integrated circuit die (12) and the substrate (14). A mold (30) is disposed about the preassembly (18) such that the mold (30) cooperates with the substrate (14) to define a mold cavity (32) that encloses the integrated circuit die (12). The mold (30) has a molding surface (34) that includes the surrounding region (28) and a mold surface (34) that faces the back face (24) and is spaced apart therefrom. A polymeric precursor (36) is dispensed into the mold cavity (32) and is formed against the molding surface (34) and the back face (24). The polymeric precursor (36) is then cured to form a polymeric encapsulant (38) that encapsulates the integrated circuit die (12).

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patent: 5285352 (1994-02-01), Pastore et al.
patent: 5302849 (1994-04-01), Cavasin
patent: 5371404 (1994-12-01), Juskey et al.
patent: 5682066 (1997-10-01), Gamota et al.
patent: 5804881 (1998-09-01), Wille et al.

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