Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Patent
1995-05-15
1998-09-01
Saadat, Mahshid D.
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
257688, 257689, 257692, 439 66, 439 91, H01L 2348, H01L 2352, H01R 909, H01R 458
Patent
active
058014411
ABSTRACT:
A microelectronic connection component includes a dielectric sheet having an area array of elongated, strip-like leads. Each lead has a terminal end fastened to the sheet and a tip end detachable from the sheet. Each lead extends horizontally parallel to the sheet, from its terminal end to its tip end. The tip ends are attached to a second element, such as another dielectric sheet or a semiconductor wafer. The first and second elements are then moved relative to one another to advance the tip end of each lead vertically away from the dielectric sheet and deform the leads into a bent, vertically extensive configuration. The preferred structures provide semiconductor chip assemblies with a planar area array of contacts on the chip, an array of terminals on the sheet positioned so that each terminal is substantially over the corresponding contact, and an array of metal S-shaped ribbons connected between the terminals and contacts. A compliant dielectric material may be provided between the sheet and chip, substantially surrounding the S-shaped ribbons.
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"Electronic Packaging and Interconnection Handbook", pp. 7.24-7.25; Harper.
Research Disclosure No. 322 (Feb. 1991) "Method of Testing chips and Joining Chips to Substrates," XP 000169195.
DiStefano Thomas H.
Smith John W.
Clark Jhihan B.
Saadat Mahshid D.
Tessera Inc.
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