Fishing – trapping – and vermin destroying
Patent
1991-08-07
1993-11-30
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437228, 437978, 156644, H01L 21441
Patent
active
052665259
ABSTRACT:
A method of manufacturing an interlayer dielectric for microelectronic devices having multiple conducting layers provides a planarized surface for deposition of subsequent layers and further prevents cracking of spin-on-glass by limiting spin-on-glass thickness to about 0.4 .mu.m or less. A first dielectric layer is formed over a first conducting layer by means of reacting Si(OC.sub.2 H.sub.5).sub.4 and O.sub.2 at approximately 9 torr between 370.degree. C. to 400.degree. C., and a second dielectric layer is formed over the first dielectric layer by a method different than that used to form the first dielectric layer. After etching back the second dielectric layer, a spin-on-glass layer is formed. Spin-on-glass layer is etched back to provide a planar surface and a third dielectric layer is formed over the spin-on-glass layer. The resulting surface is ready for contact hole formation, deposition and patterning of subsequent conductive and insulating layers.
REFERENCES:
patent: 4654113 (1987-03-01), Tuchiya et al.
patent: 4775550 (1988-10-01), Chu et al.
S. Wolf, Silicon Processing for the VLSI Era: vol. 2, Lattice Press, Sunset Beach, pp. 198-199, 232-234, 279-283, 532-533.
Translation of Takao JP 63-208243.
Hearn Brian E.
Holtzman Laura M.
Seiko Epson Corporation
Werner Raymond J.
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