Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor
Patent
1995-03-01
1997-08-12
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
257619, 257146, 257335, 257401, 257909, H01L 27118
Patent
active
056568509
ABSTRACT:
A microelectronic integrated circuit includes a semiconductor substrate, and a plurality of microelectronic devices formed on the substrate. Each device has a periphery defined by a hexagon, and includes an active area formed within the periphery. A first terminal and a second terminal are formed in the active area adjacent to edges of the hexagon that are separated by another edge. First to third gates are formed between the first and second terminals, and have gate terminals formed outside the active area adjacent to other edges of the hexagon. The power supply connections to the first and second terminals, the conductivity type (NMOS or PMOS), and the addition of a pull-up or a pull-down resistor is selected for each device to provide a desired AND, NAND, OR or NOR function. The devices are interconnected using three direction routing based on hexagonal geometry.
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Chaudhuri, P. Pal, Routing Multilayer Boards on Steiner Metric, 1980 IEEE International Symposium on Circuits and Systems Proceedings, vol. 3 of 3, pp. 961-964.
Crane Sara W.
LSI Logic Corporation
Williams Alexander Oscar
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