Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature
Reexamination Certificate
2001-09-06
2002-12-31
Paladini, Albert W. (Department: 2827)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having substrate registration feature
C438S424000, C430S022000, C430S030000, C356S399000, C356S400000, C356S401000
Reexamination Certificate
active
06500725
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to methods for fabricating microelectronic fabrications. More particularly, the present invention relates to methods for fabricating, with enhanced efficiency, microelectronic fabrications.
2. Description of the Related Art
Microelectronic fabrications are formed from microelectronic substrates over which are formed patterned conductor layers which are separated by dielectric layers.
As microelectronic fabrication integration levels have increased and patterned conductor layer dimensions have decreased, there has evolved a continuing and intensified interest in providing methods through which microelectronic fabrications may be more efficiently fabricated. In turn, methods for efficiently fabricating microelectronic fabrications are desirable in the art of microelectronic fabrication such as to provide for cost effective microelectronic fabrication products when fabricating microelectronic fabrications.
While methods for efficiently fabricating microelectronic fabrications are thus clearly desirable in the art of microelectronic fabrication and often essential in the art of microelectronic fabrication, methods for efficiently fabricating microelectronic fabrications are nonetheless not entirely without problems in the art of microelectronic fabrication. In that regard, methods for efficiently fabricating microelectronic fabrications are often difficult to develop insofar as microelectronic fabrications methods typically involve a multiplicity of related microelectronic fabrication process tools which must be employed in synchronization for fabricating a microelectronic fabrication.
It is thus desirable in the art of microelectronic fabrication to provide methods and materials which may be employed for fabricating microelectronic fabrications, with enhanced efficiency.
It is towards the foregoing object that the present invention is directed.
Various methods, apparatus and systems have been disclosed in the art of microelectronic fabrication for forming microelectronic fabrications with desirable properties.
Included among the methods, apparatus and systems, but not limited among the methods, apparatus and systems, are methods, apparatus and systems disclosed within: (1) Van Der Werf et al., in U.S. Pat. No. 6,122,058 (an interferometric system assembled within a lithographic apparatus for fabricating a microelectronic fabrication, wherein the interferometric system employs two wavelengths such as to provide enhanced detection efficiency within the lithographic apparatus when fabricating the microelectronic fabrication therein); and (2) Bruce et al., in U.S. Pat. No. 6,147,394 (a method for fabricating a microelectronic fabrication while employing a hybrid photoresist material which comprises a negative tone component and a positive tone component, such as to form within the microelectronic fabrication three independent microelectronic fabrication regions while employing a single photolithographic masking process step).
Desirable in the art of microelectronic fabrication are additional methods and materials which may be employed for fabricating microelectronic fabrications with enhanced efficiency.
It is towards the foregoing object that the present invention is directed.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a method for fabricating a microelectronic fabrication, with enhanced efficiency.
A second object of the present invention is to provide a method for fabricating a microelectronic fabrication in accord with the first object of the invention, wherein the method is readily commercially implemented.
In accord with the objects of the present invention, there is provided by the present invention a method for fabricating a microelectronic fabrication. To practice the method of the present invention, there is first provided a substrate. There is then formed simultaneously within the substrate an alignment mark and an isolation trench formed employing a single etch method and to an identical depth within the substrate. There is then formed within the isolation trench an isolation region. Finally, there is then further processed the substrate while aligning the substrate while using the alignment mark with a minimum of two alignment wavelengths.
There is provided by the present invention a method for fabricating a microelectronic fabrication, with enhanced efficiency, wherein the method is readily commercially implemented.
The method of the present invention realizes the foregoing objects by forming simultaneously within the substrate an alignment mark and an isolation trench formed employing a single etch method and to an identical depth within the substrate. Finally, there is then further processed the substrate while aligning the substrate while using the alignment mark with a minimum of two alignment wavelengths.
The method of the present invention is readily commercially implemented.
The present invention employs methods and materials as are generally conventional in the art of microelectronic fabrication, but employed within the context of a specific application to provide the method of the present invention.
Since it is thus at least in part a specific application which provides at least in part the present invention, rather than the existence of methods and materials which provides the present invention, the method of the present invention is readily commercially implemented.
REFERENCES:
patent: 5316966 (1994-05-01), Van Der Plas et al.
patent: 6122058 (2000-09-01), Van Der Werf et al.
patent: 6147394 (2000-11-01), Bruce et al.
Chen Chien-Chuan
Peng Chiang-Jen
Su Bin-Chia
Suen Shu-Huei
Paladini Albert W.
Taiwan Semiconductor Manufacturing Company Ltd
Tung & Associates
Zarneke David A.
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