Semiconductor device manufacturing: process – Repair or restoration
Reexamination Certificate
2001-08-29
2002-08-27
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Repair or restoration
C438S017000
Reexamination Certificate
active
06440757
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to electrical probe apparatus electrical test methods for electrical test testing microelectronic fabrication die. More particularly, the present invention relates to electrical probe apparatus electrical test methods for accurately and efficiently electrically test testing microelectronic fabrication die.
2. Description of the Related Art
Microelectronic fabrications are formed from microelectronic substrates over which are formed patterned microelectronic conductor layers which are separated by microelectronic dielectric layers.
Integral to the fabrication of microelectronic fabrications, and in particular to the fabrication of semiconductor integrated circuit microelectronic fabrications, is the electrical test testing of microelectronic fabrication die. The electrical test testing of microelectronic fabrication die may occur: (1) during various stages incident to the ongoing fabrication of microelectronic fabrication substrates, as is generally understood to encompass in-line electrical test testing of microelectronic fabrication die; as well as (2) subsequent to completion of fabrication of microelectronic fabrication substrates, as is generally understood to encompass final electrical test testing of microelectronic fabrication die. Within either in-line electrical test testing of microelectronic fabrication die or final electrical test testing of microelectronic fabrication die there is typically and preferably employed an electrical probe apparatus electrical test method which provides for electrical probe apparatus electrical test testing of various microelectronic devices and/or various microelectronic circuits within a plurality of microelectronic fabrication die fabricated within a microelectronic fabrication substrate.
While in-line electrical test testing of microelectronic fabrication die and final electrical test testing of microelectronic fabrication die while employing electrical probe apparatus electrical test methods are both of considerable interest and of considerable importance to the goal of fabricating fully functional and fully reliable microelectronic fabrication die, both in-line electrical test testing of microelectronic fabrication die and final electrical test testing of microelectronic fabrication die while employing electrical probe apparatus electrical test methods are nonetheless not entirely without problems with respect to the goal of fabricating fully functional and fully reliable microelectronic fabrication die. In that regard, both in-line electrical test testing of microelectronic fabrication die and final electrical test testing of microelectronic fabrication die while employing electrical probe apparatus electrical test methods are often not entirely accurate when fabricating microelectronic fabrication die and often require a considerable expenditure of microelectronic fabrication processing resources, including but not limited to microelectronic fabrication cycle time processing resources, microelectronic fabrication tooling processing resources and microelectronic fabrication direct labor processing resources when fabricating microelectronic fabrication die. Such electrical test testing inaccuracy and considerable expenditure of microelectronic fabrication processing resources in turn increases in general microelectronic fabrication production costs when fabricating microelectronic fabrication die.
It is thus desirable in the art of microelectronic fabrication to provide electrical test methods for more accurately and efficiently electrical test testing microelectronic fabrication die fabricated within microelectronic fabrication substrates.
It is towards the foregoing object that the present invention is directed.
Various methods, systems and apparatus for electrically test testing microelectronic fabrications, such as to realize desirable results incident to electrical test testing microelectronic fabrications, have been disclosed in the art of microelectronic fabrication.
For example, Shibata, in U.S. Pat. No. 5,585,737, discloses an electrical probe apparatus electrical test method for electrical test testing within a semiconductor integrated circuit microelectronic fabrication substrate wafer a series of semiconductor integrated circuit microelectronic fabrication die fabricated within the semiconductor integrated circuit microelectronic fabrication substrate wafer while minimizing a number of times the semiconductor integrated circuit microelectronic fabrication substrate wafer must be indexed when electrical test testing the series of semiconductor integrated circuit microelectronic fabrication die within the semiconductor integrated circuit microelectronic fabrication substrate wafer. To realize the foregoing result, the electrical probe apparatus electrical test method employs within an electrical probe apparatus an electrical probe apparatus electrical test card sized and fabricated such as to electrical probe test a plurality of semiconductor integrated circuit microelectronic fabrication die index regions within the semiconductor integrated circuit microelectronic fabrication substrate wafer, where the plurality of semiconductor Integrated circuit microelectronic fabrication die index regions within the semiconductor integrated circuit microelectronic fabrication substrate wafer is formed in a bidirectional array of columns and rows of an even numbered plurality, and wherein at least one of the even numbered plurality is equal to four, and further where the plurality of semiconductor integrated circuit microelectronic fabrication die index regions within the semiconductor integrated circuit microelectronic fabrication substrate wafer is arranged such as to minimize non-contact of the electrical probe apparatus electrical test card with the series of semiconductor integrated circuit microelectronic fabrication die within the semiconductor integrated circuit microelectronic fabrication substrate wafer.
In addition, Song, in U.S. Pat. No. 5,838,951, discloses an electrical test data manipulation method for more effectively utilizing electrical test data for a series of semiconductor integrated circuit microelectronic fabrication die fabricated within a semiconductor integrated circuit microelectronic fabrication substrate wafer such as to in turn provide for enhanced manufacturing efficiency when die bonding within a series of die bond packages the series of semiconductor integrated circuit microelectronic fabrication die when parted from the semiconductor integrated circuit microelectronic fabrication substrate wafer. To realize the foregoing result, the electrical test data manipulation method provides for preparation from a series of electrical test data obtained from the series of semiconductor integrated circuit microelectronic fabrication die within the semiconductor integrated circuit microelectronic fabrication substrate wafer a wafer map format file from which is derived a converted wafer map format file which in turn may be employed by a semiconductor integrated circuit microelectronic fabrication die bonder fabrication tool when die bonding the series of semiconductor integrated circuit microelectronic fabrication die within a series of semiconductor integrated circuit microelectronic fabrication packages.
Further, Stubblefield et al., in U.S. Pat. No. 6,043,101, discloses an electrical probe apparatus electrical test method which may be employed for efficiently reducing with respect to electrical probe apparatus electrical test testing of a series of semiconductor integrated circuit microelectronic fabrication die within a semiconductor integrated circuit microelectronic fabrication substrate wafer a quantity of false electrical failures for a sub-series of semiconductor integrated circuit microelectronic fabrication die within the series of semiconductor integrated circuit microelectronic fabrication die. To realize the foregoing result, the electrical probe apparatus electrical test method provides for an immediate
Chaudhari Chandra
Taiwan Semiconductor Manufacturing Co. Ltd
Tung & Associates
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