Microelectronic device structure with metallic interlayer...

Active solid-state devices (e.g. – transistors – solid-state diode – Specified wide band gap semiconductor material other than... – Diamond or silicon carbide

Reexamination Certificate

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C257S712000, C257S720000

Reexamination Certificate

active

06534792

ABSTRACT:

This invention relates to a microelectronic device structure in which a microelectronic device die is supported on a substrate, and, more particularly, to the reduction of thermal stress between the substrate and the die while achieving high heat removal from the die through the substrate.
BACKGROUND OF THE INVENTION
A microelectronic device typically has a large number of active and passive circuit elements formed in a semiconductor material, the unitary structure being termed a die or chip. The die is small in size and relatively fragile. It is therefore affixed to and supported on a substrate, which includes a base and, optionally, a cover. The substrate physically supports and protects the die, and also provides the points of electrical interconnection to the circuit elements on the die. The substrate also provides a heat flow path for removal of heat from the die.
In many applications, the resulting microelectronic device structure experiences temperature changes during operation. One source of temperature change is the environment of the microelectronic device structure. Another source is heat generated by the circuit elements on the die.
The thermal expansion coefficients of the substrate and the die are typically different. Thermal strains result when the temperature is changed. The thermal strains in turn produce thermal stresses between the substrate and the die, which may cause the die to strain and eventually crack. To reduce the thermal stresses produced in the die, it has been common practice to join the die to the substrate with a deformable plastic or adhesive material. The plastic or adhesive deforms to accommodate the thermal strains, so that the thermal stresses in the die are greatly reduced as compared with an approach wherein the die is soldered to the substrate with a metal.
However, the thermal conductivity of typical plastics and adhesives is much lower than metals. The use of the plastics or adhesives to join the die to the substrate therefore results in a diminished capability to remove heat from the die into the substrate. Metal-filled adhesives and plastics with increased thermal conductivity have been developed in an attempt to achieve both reduction of thermal stresses and improved thermal conduction through the joint between the die and the substrate, but their thermal conductivities still fall far short of those of metals.
Recent innovations in substrate materials have produced substantial increases in the ability of the substrate to diffuse heat. For example, diamond has a high thermal conductivity and the ability to remove heat, and it has been found practical to use industrial CVD (chemical vapor deposited) diamond in some substrate applications. With these improvements in substrate design, the interface between the die and the substrate has taken on even greater significance. There is a need for an improved approach for affixing the die of the microelectronic device to the substrate, which achieves both an acceptable state of stress in the die and also accomplishes rapid heat removal from the die to the substrate. The present invention fulfills this need, and further provides related advantages.
SUMMARY OF THE INVENTION
The present invention provides a microelectronic device structure in which a microelectronic device die is attached to a substrate. The approach for attaching the die to the substrate results in a favorable stress state in the die at all temperatures typically encountered during manufacturing and service. Heat flows rapidly from the die to the substrate, which aids in maintaining the die within its operating temperature range. The approach is operable with a wide variety of substrates and dies, and in particular is operable with substrates having diamond to which a gallium arsenide die is attached.
In accordance with the invention, a microelectronic device structure comprises a substrate, and a metallic interlayer affixed to the substrate and having an upper surface. A microelectronic device is affixed to the upper surface of the metallic interlayer.
In a preferred application, the substrate, such as a metallic header, comprises diamond, and the metallic interlayer is affixed to the diamond. The metallic interlayer is made of a metal preferably selected from the group consisting of copper, silver, and gold, most preferably a metal selected from the group consisting of unalloyed copper, unalloyed silver, and unalloyed gold. The metallic interlayer preferably has a thickness of from about 0.003 inch to about 0.009 inch. The die is preferably made of gallium arsenide, silicon, germanium, silicon-germanium, or indium phosphide, although it is not so limited. In one construction, a first solder layer is positioned between the substrate and the metallic interlayer, and a second solder layer is positioned between the metallic interlayer and the microelectronic device.
The use of the metallic interlayer results in good heat transfer from the die to the substrate. To reduce the thermal stresses in the die, and most preferably to place the die in a slight compressive state, the material of construction and thickness of the metallic interlayer are selected such that a coefficient of thermal expansion at the upper surface of the metallic interlayer is the same as, or more preferably, greater than a coefficient of thermal expansion of the die. It is most preferred that the coefficient of thermal expansion at the upper surface of the metallic interlayer is greater than a coefficient of thermal expansion of the die by an amount not exceeding about 3 parts per million per degree Centigrade (ppm/° C.). The result of this preferred thermal design is that the stresses in the die are controlled to be slightly compressive. The fragile semiconductor material of the die is able to bear such compressive loads without failure. For example, where the die is gallium arsenide having a coefficient of thermal expansion of about 6 parts per million per degree Centigrade, the material of construction and thickness of the interlayer are selected so that the coefficient of thermal expansion of the upper surface of the interlayer is from about 6 to about 8 parts per million per degree Centigrade.
To prepare the microelectronic device structure, the substrate, the metallic interlayer, and the microelectronic device die are provided. The metallic interlayer is affixed to the substrate, and the microelectronic device die is affixed to the interlayer. Most preferably, the step of affixing the metallic interlayer to the substrate includes the step of soldering the metallic interlayer to the substrate at a first soldering temperature using a first soldering alloy having a first-soldering alloy melting temperature less than the first soldering temperature. The step of affixing the microelectronic device die to the interlayer is performed after the step of affixing the metallic interlayer to the substrate. The step of affixing the microelectronic device die to the interlayer includes soldering the microelectronic device die to the metallic interlayer at a second soldering temperature that is less than the first-soldering alloy melting temperature, where the second soldering alloy has a second-soldering alloy melting temperature of less than the second soldering temperature.
During this preparation process, the die is affixed to the interlayer with a zero internal stress at elevated temperature. Upon cooling, the interlayer contracts slightly more than the die, placing the die in a slight compressive stress state. The microelectronic device structure is not heated as high as the soldering temperatures during service (or it would structurally fail), so that the die remains in a slight compressive stress state during service and does not fail by tensile loading and cracking.
The heat flow path from the die to the substrate is through the interlayer and the solder materials, which are all metals and have relatively high thermal conductivities. The careful selection of the material of construction and dimension of the interlayer keeps the stress state in the die very low

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