Microelectronic assemblies having very fine pitch stacking

Details Microelectronic assemblies having very fine pitch stacking Microelectronic assemblies having very fine pitch stacking

2005-12-23

2011-11-29

Toledo, Fernando L (Department: 2895)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S106000, C438S108000, C438S109000, C438S118000, C438S121000, C438S123000

Reexamination Certificate

active

08067267

ABSTRACT:
A method of making a stacked microelectronic assembly includes providing a first microelectronic package that includes a first substrate having a first dielectric layer, conductive posts, and conductive traces extending along the surface of the first dielectric layer; providing a second microelectronic package including a second substrate that includes a second dielectric layer; securing a microelectronic element to one of the surfaces of at least one of the first or second substrates; and joining the conductive posts of the first substrate with the fusible masses of the second substrate. The posts may include a plurality of aligned posts which are aligned in a first row extending in a single orthogonal direction along a surface of the first substrate away from a portion of the first substrate that faces a face of the microelectronic element. The aligned posts are disposed beyond one of the edges of the microelectronic element.

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