Microcoprocessor, memory management unit interface to support on

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364DIG1, G06F 1312

Patent

active

052838811

ABSTRACT:
The invention comprises an interface for switching control of a memory management unit (MMU) between a central processing unit (CPU) having a register stack for storing data, and one or more coprocessors (COP) each having register stacks for storing data. The COP is operative when actuated to perform selected functions, not normally performed by the CPU, utilizing information in memory.

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