Microcontroller having an EPROM with a low voltage program inhib

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371 4, 371 66, 395575, 364707, 364DIG1, G06F 1130

Patent

active

051990326

ABSTRACT:
A microcontroller is provided having an on-chip electrically erasable programmable read-only-memory (EEPROM), which is user programmable via a programming register. The microcontroller includes a low voltage program inhibit (LVPI) circuit which is combined with the existing EEPROM design. By integrating the LVPI circuit into the EEPROM, the EEPROM may be protected without disabling the entire data processing system. If the supply voltage (V.sub.DD) falls below a predetermined voltage level, the LVPI circuit inhibits the use of the EEPROM programming register, thereby preventing the CPU from programming or erasing the EEPROM. A comparator in the LVPI circuit compares a precision reference voltage to a voltage divided off of the power supply (V.sub.DD), and provides a output signal to the EEPROM programming register. During normal operation, the comparator output signal is a logic low, which enables the user to program or erase the EEPROM, via the programming register. When the supply voltage is below the predetermined safe level, the comparator output signal is a logic high signal, which sets a control bit in the programming register. When set, the control bit clears the remaining bits in the programming register, thereby disabling a charge pump, and preventing any further EEPROM programming.

REFERENCES:
patent: 4644494 (1987-02-01), Muller
patent: 4780843 (1988-10-01), Tietjen
patent: 4977537 (1990-12-01), Dias et al.
patent: 5014191 (1991-05-01), Padgaonkar et al.
patent: 5040178 (1991-08-01), Lindsay et al.

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