Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Least weight routing
Reexamination Certificate
1998-08-31
2001-06-05
Banankhah, Majid (Department: 2755)
Electrical computers and digital processing systems: multicomput
Computer-to-computer data routing
Least weight routing
C709S241000
Reexamination Certificate
active
06243735
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a multitasking microcontroller and to a data processing system employing such a multitasking microcontroller operable to control a plurality of hardware engines and it further relates to a method of controlling task switching.
Multitasking microcontrollers have been known in the art. In a typical multitasking microcontroller, a built-in processor sequentially executes a plurality of tasks and a task timer therefore makes periodic issues of timer interruptions which request task switching to be made. Every time the processor accepts such a timer interruption, an interruption handling routine in the operating system (OS) is activated. The interruption handling routine performs the scheduling of tasks and the saving and restoring of resources.
Conventional multitasking microcontrollers have some drawbacks. For example, the scheduling of tasks is carried out using an interruption handling routine in a conventional multitasking microcontroller. This produces the problem that there is created much overhead at task switching time, therefore resulting in a drop in microcontroller performance.
This is a serious problem for the applications which attach great importance to real-time processing such as image data encoding.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a microcontroller capable of switching between tasks at a high speed.
Another object of the present invention is to provide a data processing system employing a microcontroller (which controls a plurality of hardware engines) for the realization of high-speed task switching in the microcontroller.
Yet another object of the present invention is to provide a method of controlling task switching for the realization of high-speed task switching.
The objects of the present invention are achieved as follows. The microcontroller of the present invention controls the task switching not by means of an interruption handling routine, but by means of a hardware scheduler. In accordance with the present invention, a plurality of tasks are allocated to respective hardware engines. In such an environment, a task switching operation is controlled by the hardware scheduler on the basis of information representative of the allocation of the tasks to the hardware engines. Some of the hardware engines execute time critical processes and the other hardware engines do not. In accordance with the present invention, a relationship among the hardware engines is reflected in the execution priority of the tasks, which makes it possible to select a task to be run next in a short time without redeterming which of the hardware engines executes a time critical process at the time of task switching. In other words, there is created less overhead when task switching occurs. High-speed task switching is realized.
Undesirable dead time occurs in a time sharing method which carries out switching between tasks in response to an interruption periodically issued by a task timer, in view of which the present invention was made. Accordingly, the microcontroller of the present invention adopts an event-driven method capable of performing task switching in fast response to the occurrence of an event (i.e., an event of hardware engine execution termination). Each task can be in one of at least three states: a first state (the state of READY) representative of an execution wait status, a second state (the state of ACTIVE) representative of a running status, and a third state (the state of SLEEP) representative of an allocated hardware engine execution termination status. A task is in the state of ACTIVE when it uses the microcontroller and in the state of ACTIVE a hardware engine allocated to the task is controlled. A task is in the state of READY when it is not selected therefore waiting to be selected although it is ready to use the microcontroller. A task is in the state of SLEEP when it waits for a hardware engine allocated thereto to be execution-terminated (in other words, it is not ready to use the microcontroller). A task that has finished activating its allocated hardware engine makes a state transition from ACTIVE to SLEEP in response to a given instruction (the task
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sleep instruction). When the execution of a certain hardware engine is terminated, a task allocated to that hardware engine makes a state transition from SLEEP to READY and a task under execution makes a state transition from ACTIVE to READY. Thereafter, a task having the highest execution priority in all tasks assuming the state of READY is selected as a task to be run next. The task thus selected makes a state transition from READY to ACTIVE.
If a plurality of register files are prepared in the microcontroller so that a plurality of hardware engines can use the register files as mutually independent working areas, there is created much less overhead at the time of task switching because what is required to do at the task switching time is just saving processor resources such as program counter. A register file for storing a setting parameter common to a plurality of hardware engines can be prepared in the microcontroller.
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Masahiro Gion, et al., “National Technical Report”, vol. 40, No. 6, pp. 122-128, Dec. 1994.
Takashi Yokomizo, “Interface” pp. 135-146, Jan. 1995.
Araki Toshiyuki
Imanishi Hiroshi
Banankhah Majid
Matsushita Electric - Industrial Co., Ltd.
McDermott & Will & Emery
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