Microcomputer with offset in store-accumulator operations

Details Microcomputer with offset in store-accumulator operations Microcomputer with offset in store-accumulator operations

1982-02-22

1986-08-26

Chan, Eddie P.

Boots, shoes, and leggings

G06F 900, G06F 1300

Patent

active

046086340

ABSTRACT:
A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data; however, the accumulator in the data path may be used as a program address source. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension. A separate shift or offset is provided in coupling the output of the accumulator to an internal data bus for use in scaling when storing the accumulator contents in internal data RAM specified by instructions. Also, the RAM itself has an internal shift function used in convolution.

REFERENCES:
patent: 4079454 (1978-03-01), Sorenson et al.
patent: 4133028 (1979-01-01), Bernstein
patent: 4179734 (1979-12-01), O'Leary
patent: 4338675 (1982-07-01), Palmer
patent: 4418383 (1983-11-01), Doyle et al
patent: 4450519 (1984-05-01), Guttag et al.

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