Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2001-07-24
2003-09-23
Ho, Hoai (Department: 2818)
Static information storage and retrieval
Floating gate
Particular connection
C365S185030
Reexamination Certificate
active
06625060
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a microcomputer with a CPU mounted therein, and to a memory control method used FOR the microcomputer.
Devices with a CPU mounted therein generally have ROM or nonvolatile memory as the main memory for storing programs (“firmware” below) executed by the CPU, which is randomly accessible in storing programs. Randomly accessible RAM (such as SRAM or DRAM) is also provided on board as temporary storage for data that is continually being rewritten. Each of these memories is mapped to address space defined by the CPU. The firmware can be read directly from nonvolatile memory to CPU and executed.
FIG. 7
is a block diagram showing the configuration of a microcomputer with a randomly accessible memory (referred to below as “random access memory”) mounted therein. This microcomputer
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has a CPU
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, a memory controller
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for controlling the memory used by the CPU
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, random access memory (RAM)
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used to temporarily store data that is frequently rewritten by the CPU
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, and randomly accessible nonvolatile memory
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used for storing user data and firmware not frequently rewritten. The CPU
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also has internal registers
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used for data storage and operations, and program counter
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indicating the storage address of the program executed next.
Memory controller
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controls a signal for data reading and writing to memory in response to memory access requests from CPU
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. As noted above, randomly accessible RAM
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temporarily stores various types of data, including user data, and randomly accessible nonvolatile memory
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stores user data and firmware that need not be rewritten frequently. Data stored in RAM
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is generally lost when the power supply is interrupted, and microcomputer
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must therefore also store the data to nonvolatile memory
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if the data must be saved.
In recent years, however, the explosion in functions provided in a portable terminal device such as cellular phone, notebook computer, personal digital assistant (PDA), has also increased the complexity of the firmware, and as it grows there is also a tendency for growth in the amount of data for user's personal information to be stored. This means that the capacity of ROM and RAM on devices must also increase.
The maximum storage capacity of such randomly accessible memory devices is, however, 32 Mbit to 64 Mbit in the case of nonvolatile memory, and about 4 Mbit in the case of SRAM. In random access memory, the address controller is typically comparatively large and the memory cell structure is complicated, and the chip size is therefore large. The chip mounting area thus also increases in conjunction with the increase in capacity of ROM and RAM. This is obviously not desirable for portable terminal devices of which miniaturization has been advanced.
Distinct from random access memory, block access memory is known, which its chip mounting area is small considering its storage capacity. Block access memory can store about 512 bytes to 2 Kbytes of data per address, and serial data input/output can be achieved by generating a data I/O clock signal for the memory. Furthermore, because the address controller and memory cell structure are less complicated than those of random access memory, block access memory chips can be manufactured with relatively greater storage capacity than a random access memory chip of the same size. Hitherto, there are also block access nonvolatile memory devices with storage capacity exceeding 256 Mbit.
Block access nonvolatile memory is not, however, randomly accessible, and programs cannot be executed by directly mapping memory to memory address space defined by the CPU. Furthermore, while providing randomly accessible nonvolatile memory for firmware storage, randomly accessible RAM for temporarily data storage, and block access nonvolatile memory for storing large amounts of user data to deal with the increase in firmware and data size makes it possible to achieve the desired functions, the number of parts is increased and an increase in cost grows. In addition, the total area needed to mount all of these parts also obviously increases.
The present invention was conceived with consideration for the above problems, and an object of this invention is to provide a microcomputer with a CPU and memory storing a program executed by CPU, that can reduce the number of parts, cost, and the total surface area required to mount the parts, and thus facilitates reducing the size of the device in which the microcomputer is used.
A further object of the invention is to provide a memory control method for the microcomputer.
SUMMARY OF THE INVENTION
In an aspect of the present invention, there is provided a microcomputer with a CPU and memory storing a program executed by the CPU mounted therein, the microcomputer comprising; a block access nonvolatile memory for storing the program; at least one random access memory for temporarily storing an externally input program; and a memory controller for reading the program stored in the block access nonvolatile memory and storing the program in the random access memory as a program sequentially read and executed by the CPU.
Preferably, the memory controller may detect a value set on a program counter indicating an address in the program to be executed by the CPU and read the program corresponding to the value from the block access nonvolatile memory, and store the program in the random access memory.
Before the value set on the program counter goes outside the range of the program temporarily stored in the random access memory, the memory controller yet further preferably may read a following program to be executed hereafter from the block access nonvolatile memory and store the read program to random access memory.
Further preferably, the memory controller may read the following program stored in random access memory and interpret contents of the program, and if the following program contains a conditional branch instruction, the memory controller may read the program starting from the address indicated by the branch instruction from block access nonvolatile memory and store the read program in random access memory.
In an another aspect of the present invention, there is provided a memory control method used for a microcomputer with a CPU and memory storing a program executed by the CPU mounted therein, the method comprising steps of: reading the program from block access nonvolatile memory storing the program; and storing the read the program in random access memory for temporarily storing an externally input program as a program sequentially read and executed by the CPU.
This memory control method preferably comprises further steps of detecting a value set to a program counter indicating an address of a program to be executed by the CPU, reading the program corresponding to the value from the block access nonvolatile memory, and storing the program in the random access memory.
Further preferably, the memory control method comprises a further step of reading a following program to be executed hereafter from the block access nonvolatile memory and storing the read following program in random access memory before the value set on the program counter goes outside the range of the program temporarily stored in the random access memory.
Yet further preferably, the memory control method comprises further steps of reading the following program stored in random access memory, interpreting contents of the program, and if the interpreted following program contains a conditional branch instruction, reading the program starting from an address indicated by a conditional branch instruction from block access nonvolatile memory, and storing the program in random access memory.
Other objects and attainments together with a fuller understanding of the invention will become apparent and appreciated by referring to the following description and claims taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4868760 (1989-09-01), Obara
patent: 5832260 (1998-11-01), Aror
Ho Hoai
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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