Boots – shoes – and leggings
Patent
1979-05-01
1982-06-08
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 932
Patent
active
043342680
ABSTRACT:
A single-chip microcomputer comprises a central processor unit (100), a random access memory (110), a read only memory (120), internal timing circuitry including a timer counter (131), and three I/O data ports (140, 150, and 160). Included within the instruction set of the microcomputer are a branch on bit set instruction and a branch on bit clear instruction. The branch on bit set instruction is a three-byte instruction in which the first byte represents the op code including a designation of a particular bit to be examined, the second byte represents the address of a memory location in which the designated bit is to be examined, and the third byte represents an offset which when combined with the contents of the program counter designates a memory location to which a branch is to be taken if the designated bit is in fact set. For the branch on bit clear instruction, a branch is performed when the particular bit examined is determined not to be set. The branch on bit set and branch on bit clear instructions facilitate serial I/O operations by the microcomputer.
REFERENCES:
patent: 3990052 (1976-11-01), Gruner
patent: 4053944 (1977-10-01), Dixon
patent: 4107781 (1978-08-01), Barrett et al.
patent: 4124893 (1978-11-01), Joyce et al.
Boney Joel F.
Rupp, II Edward J.
Thomas James S.
Heckler Thomas M.
Ingrassia Vince
Motorola Inc.
Myers Jeffrey Van
Sarli, Jr. Anthony J.
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