Microcomputer system with bus control means for peripheral proce

Details Microcomputer system with bus control means for peripheral proce Microcomputer system with bus control means for peripheral proce

1984-03-19

1985-07-09

Kemeny, E. S. Matt

Boots, shoes, and leggings

G06F 900

Patent

active

045286264

ABSTRACT:
A microcomputer system includes a main processor, a memory and a direct memory access controller (DMA) effective to control direct data transfer between the memory and input/output devices on channels. Bus control for data transfer is switchable between the DMA and processor by a hold request/acknowledge handshaking sequence between the DMA and processor. A control line from the channels is activated by a peripheral processing device on a channel when it wishes to gain control of the busses for data transfer. Logic means coact with the handshaking sequence to determine which device gains control of the busses. This logic is responsive to the DMA address enable output (AEN), the hold acknowledge output of the main processor (HLDA) and the channel control line output (-MASTER). When all these are deactivated, control passes to the main processor, when AEN and HLDA only are activated, control passes to the DMA controller and, when all three are activated, control passes to the peripheral processing device.

REFERENCES:
patent: 4047158 (1977-09-01), Jennings
patent: 4112490 (1978-09-01), Pohlman et al.
patent: 4180855 (1979-12-01), Buedel
Computer I/O Part V Kolobaud Classroom, published by Peter Stale in Microcomputing, Mar. 1979, pp. 108-112.

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