Microcomputer network having several microcomputer modules which

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G06F 946, G06F 1516

Patent

active

043216692

ABSTRACT:
In a microcomputer system resource and priority testing of modules is provided by first testing for readiness to exchange information via all modules, then testing for the priority assigned to the modules in which flags and registers are operated in a defined sequence to switch bus connections to the various test and data lines.

REFERENCES:
patent: 3445822 (1969-05-01), Driscoll
patent: 4063311 (1977-12-01), Jeremiah et al.
patent: 4085448 (1978-04-01), Kogge
patent: 4123794 (1978-10-01), Matsumoto
patent: 4130864 (1978-12-01), Schlotterer
patent: 4130865 (1978-12-01), Heart et al.
patent: 4153934 (1979-05-01), Sato

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