Microcomputer having easily testable interrupt controller

Details Microcomputer having easily testable interrupt controller Microcomputer having easily testable interrupt controller

1990-09-21

1993-03-09

Fleming, Michael R.

Boots, shoes, and leggings

3642382, 3642412, 3642416, 3642421, 364DIG1, 364941, 3649417, 364DIG2, 371 161, G06F 900

Patent

active

051931958

ABSTRACT:
A microcomputer includes a plurality of external terminals, an internal bus, a central processing unit coupled to the internal bus, an input/output interface connected to the external terminals and the internal bus for controlling data transfer between the microcomputer and an external device under control of the central processing unit, an interrupt request source connected to the internal bus, and an interrupt controller coupled to the internal bus and receiving an interrupt request signal from the interrupt request source so as to generate an interrupt processing request signal to the central processing unit. The interrupt controller includes a switch circuit connected to receive a vector code output enable signal and an interrupt enable signal from the central processing unit and corresponding signals from the internal bus. The switch circuit is controlled by a test mode signal supplied through one of the external terminals, so as to output the vector code output enable signal and the interrupt enable signal when the test mode signal is inactive and to output the corresponding signals from the natural bus as the vector code output enable signal and the interrupt enable signal when the test mode signal is active.

REFERENCES:
patent: 4004283 (1977-01-01), Bennett et al.
patent: 4124888 (1978-11-01), Washburn
patent: 4438492 (1984-03-01), Harmon, Jr. et al.
patent: 4648029 (1987-03-01), Cooper et al.
patent: 4716523 (1987-12-01), Burrus, Jr. et al.
patent: 5101497 (1992-03-01), Culley et al.
IBM Technical Disclosure Bulletin, vol. 29, No. 9, Feb. 1987 Interrupt Controller Diagnostic Wrap Arrangement, pp. 3871-3872.

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