Microcomputer having data shift within memory

Details Microcomputer having data shift within memory Microcomputer having data shift within memory

1982-02-22

1985-01-01

Zache, Raulfe B.

Boots, shoes, and leggings

365189, 365233, G06F 922, G06F 1300

Patent

active

044919107

ABSTRACT:
A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension. The data RAM has an internal shift arrangement useful in processing convolution algorithms. An addressed location in the RAM is read out and also shifted to the next higher location in one instruction cycle.

REFERENCES:
patent: 4161784 (1979-07-01), Cushing et al.
patent: 4295202 (1981-10-01), Joyce et al.
patent: 4330852 (1982-05-01), Redwine et al.
patent: 4334284 (1982-06-01), Wong
patent: 4338675 (1982-07-01), Palmer et al.
patent: 4395764 (1983-07-01), Matsue
patent: 4412313 (1983-10-01), Ackland et al.
patent: 4429375 (1984-01-01), Kobayashi et al.

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