Static information storage and retrieval – Magnetic bubbles – Guide structure
Patent
1991-06-21
1992-12-29
Gossage, Glenn
Static information storage and retrieval
Magnetic bubbles
Guide structure
365195, 365228, 365201, 371 211, 364DIG1, 3642466, 364969, G06F 1214, G11C 2900
Patent
active
051758407
ABSTRACT:
Easy testability and data security of an electrically erasable programmable read only memory (EEPROM) can be accomplished by disposing pads and an input/output (I/O) circuit providing addresses, data and control signals necessary for the EEPROM test on a semiconductor substrate and by disposing a two-level test I/O interception circuit consisting of an EEPROM device on the substrate such that once the testing is completed, unauthorized accessing is prevented from outside the semiconductor substrate as a result of having a built-in data security function. A microcomputer having this capability is provided with a central processing unit (CPU) for processing data, a memory, such as an EEPROM, which is internally communicating through a common bus (which transmits data, address and control signals) with the CPU, other than during a test mode, and first and second inhibition circuits which provide the security. The first inhibition circuit is coupled to the data bus and provides a first inhibition operation to prevent access operations to the memory. The first inhibition circuit release the first inhibiting operation in accordance with a signal from outside the semiconductor substrate or body. The second inhibition means is coupled to the data bus and provides a second inhibiting operation to prevent access operations to the memory from outside the semiconductor body via the data bus and permanently disables the access operations to the memory irrespective of a releasing or termination of the first inhibiting operation after the second inhibiting operation has taken effect.
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Hagiwara Yoshimune
Kihara Toshimasa
Matsubara Kiyoshi
Nakamura Hideo
Sawase Terumi
Gossage Glenn
Hitachi , Ltd.
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