1995-12-18
1998-10-20
Teska, Kevin J.
G06F 9455
Patent
active
058260595
ABSTRACT:
A microcomputer for emulation which has been conventionally unusable when built-in RAM capacities are different, because an access to an internal function circuit is different in bus control, wait condition and the like from the access to an external memory area, and despite the above fact, which now becomes usable by including a built-in RAM 17, a higher address decoder (virtual RAM address decoder) for generating a virtual RAM address space corresponding to a plurality of virtual RAM capacities within a range in which installed capacity of the built-in RAM 17 is made a maximum value, and a RAM capacity selection flag 36 for specifying any one of a plurality of virtual RAM address spaces which can be generated by the higher address decoder 22.
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Harada Daijiro
Hongo Katsunobu
Koura Masato
Fiul Dan
Mitsubishi Denki & Kabushiki Kaisha
Teska Kevin J.
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