Microcomputer development system

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371 20, G06F 1130

Patent

active

048478059

ABSTRACT:
A development system for a family of one-chip microcomputers which are all of the same architecture but differ in the memory size and the input/output number, comprises a common emulation chip having the largest memory size and the largest input/output number in the microcomputer family, an information memory storing a data memory area utilizable in a target microcomputer to be developed, a local emulation chip for emulating the peripheral hardware of the target microcomputer, and a guard controller generating a guard verify signal for stopping an emulation operation when the access is made to a memory area or a peripheral hardware which is not to be included in the target microcomputer. Thus, the access to the resources which is not to be included in the target microcomputer is inhibited.

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patent: 4674089 (1987-06-01), Poret et al.
patent: 4691316 (1987-09-01), Phillips
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patent: 4780819 (1988-11-01), Kashiwagi
patent: 4788683 (1988-11-01), Hester et al.

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