Boots – shoes – and leggings
Patent
1988-11-04
1990-08-14
Zache, Raulfe B.
Boots, shoes, and leggings
364231, 3642328, 364239, 3642394, G06F 1200
Patent
active
049492420
ABSTRACT:
A microcomputer comprises a microprocessor chip and a memory chip coupled to each other. The memory chip includes a memory for storing various processing data, a bus interface for designating an address information of the memory to be accessed for a data transfer, and an address latch for temporarily holding the address information from the bus interface and so as to supply the address information to the memory. Furthermore, there is provided an automatically updated data pointer whose initial value is set with the address information supplied from the bus interface. In case of individually designating an address for each item of data to be transferred, the address latch is used to supply the address information to the memory so that an address is given to the address latch by the bus interface for each data transfer of one unitary data. In the case of continuously designating an address for each item of data to be transferred, so that the data pointer is used to supply the address information to the memory so that an address for the data transfer of a first unitary data to be transferred is given to the data pointer and then the data pointer is automatically updated for each of the second and succeeding data transfers.
REFERENCES:
patent: 4797851 (1989-01-01), Suzuki
Katori Shigetatsu
Takeuchi Kazuhiro
NEC Corporation
Zache Raulfe B.
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