Microcomputer and test method therefore

Details Microcomputer and test method therefore Microcomputer and test method therefore

2003-10-21

2008-08-19

Moise, Emmanuel L (Department: 2137)

Information security

Prevention of unauthorized use of data including prevention...

C710S260000, C714S030000, C713S193000

Reexamination Certificate

active

07415730

ABSTRACT:
When a test mode signal is rendered active by a signal given from an external terminal, a CPU reads and runs various self-testing programs stored in a ROM. When any of the test programs comes to a process of testing a security circuit, a security test signal is rendered active and when a predetermined address is accessed then, a selector is switched to a register side by the output signal of an AND circuit of a test circuit. An illegitimate instruction, for example, is set in the register and is given to the CPU. Whether the security circuit has failure is determined by checking if an illegitimate access detection signal is output when the CPU executes the illegitimate instruction.

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patent: 5506396 (1996-04-01), Asami
patent: 5657330 (1997-08-01), Matsumoto
patent: 5671394 (1997-09-01), Katsuta
patent: 5826007 (1998-10-01), Sakaki et al.
patent: 06-324972 (1994-11-01), None
patent: 08-272695 (1996-10-01), None

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