Boots – shoes – and leggings
Patent
1985-07-03
1988-07-19
Shaw, Sareth D.
Boots, shoes, and leggings
G06F 946
Patent
active
047589485
DESCRIPTION:
BRIEF SUMMARY
The present invention relates to microcomputers and more particularly to microcomputers for effecting message transmission between concurrent processes.
BACKGROUND OF THE INVENTION
Our European Patent Specification No. 0113516 which corresponds to U.S. Ser. No. 931,946 filed Nov. 20, 1986, the specification and drawings of which are the same or substantially the same as our U.S. Pat. Nos. 4,704,678 and 4,680,698, describes a microcomputer comprising a processor and memory for operating a plurality of concurrent processes. It permits outputting processes to output data and inputting processes to input data by use of communication channels. It permits descheduling of a current process and scheduling by adding a process to a collection awaiting execution. An inputting process may input through one of a number of alternative channels but the inputting process must be scheduled in order to test the state of the channels to find when an outputting process has reached a corresponding stage in its program.
OBJECTS OF THE INVENTION
It is an object of the present invention to provide an improved microcomputer which allows a process to input data through one of a plurality of alternative channels.
It is a further object of the present invention to permit a process to input data through one of a plurality of alternative input channels and for the inputting process to be descheduled while awaiting an outputting process to reach a corresponding stage in its program.
SUMMARY OF THE INVENTION
According to various aspects of the invention, a microcomputer is providing having memory and a processor able to execute concurrent processes. A scheduling arrangement is provided which allows the processor to share its processing time between a plurality of concurrent processes. In the preferred embodiment, this scheduling arrangement includes a workspace pointer register, shown in the drawings as "WPTR REG", which is used to hold a pointer or descriptor identifying whichever process is currently being executed by the processor (this being called the "current process"). Moreover, an arrangement is provided identifying a collection of further processes awaiting execution. In the preferred embodiment, this includes specified memory locations within the workspace assigned to a respective process, such memory location pointing to the next process on the linked list to be executed. Preferably, the scheduling arrangement permits further processes to be added to the collection awaiting execution, and also includes an indicator device, such as a register or other device, which indicates the next process in the collection to be executed. Preferably a program stage indicator is provided for each of the processes.
In the preferred embodiment, the processor is responsive to a particular instruction to stop execution of the current process and to make the next process indicated by the next process indicator the current process. Illustratively, this may occur when a "SNP FLAG" is set (which stands for "Start Next Process").
The microcomputer according to this invention permits synchronized message communication between concurrent processes by the use of communication channels. A feature of this invention is the alternative input process. It permits selection of one of a number of channels, and involves the two communicating processes, which may be referred to herein as the "inputting process" and the "outputting process." A plurality of channels can be used in this procedure, and various data representing special values of process descriptors are written into and read from various locations during the process as described more fully in the detailed description.
One example, however, in general terms, an inputting process may examine a channel. If it finds no indication there that an outputting process has already addressed the channel, then it provides a first channel ready indication with an identification of the inputting process. One example in the preferred embodiment shows the inputting process leaving its workspace pointer at a st
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patent: 3978452 (1976-08-01), Barton et al.
patent: 4374409 (1983-02-01), Bienvenu et al.
patent: 4387427 (1983-06-01), Cox et al.
patent: 4447874 (1984-05-01), Bradley et al.
May Michael D.
Shepherd Roger M.
Chun Debra A.
Inmos Limited
Manzo Edward D.
Shaw Sareth D.
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