Microcomputer

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Details

364707, 364DIG1, 3642731, 3642733, G06F 124, G06F 126

Patent

active

052376982

ABSTRACT:
A microcomputer that comprises a standby signal generating circuit for supplying a standby signal to a processor and an initial reset circuit for supplying an initial reset signal to the processor when supply voltage becomes lower than a predetermined value, wherein the standby signal is produced in either case where a standby condition is sustained or imposed to switch the processor from an operation mode to a standby mode so that the supply voltage may be lowered during the standby mode, is characterized by the provision of a blocking circuit for blocking the entrance of the initial reset signal into the processor according to the standby signal thus produced.

REFERENCES:
patent: 4317180 (1982-02-01), Lies
patent: 4551841 (1985-11-01), Fujita et al.
patent: 4766567 (1988-08-01), Kato
patent: 4788661 (1988-11-01), Morita
patent: 4992951 (1991-02-01), Glowczewski et al.

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