Microcomputer

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Details

39518311, 39518313, 395568, 395704, G06F 1100

Patent

active

059012838

ABSTRACT:
A microcomputer includes a central processing unit for sequentially executing instructions according to a software program. When the CPU decodes a marker, the CPU determines the location of the marker within the software program and produces a marker decoding signal showing that the CPU has decoded the marker. A monitor unit obtains CPU operation information about operation of the CPU in response to the marker decoding signal. The monitor unit provides to a storage unit the CPU operation information and a marker identifier showing that the marker has been decoded.

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Doehle et al., "Comparator Logic To Assist Trace Facility For ROS Programs", IBM Technical Disclosure Bulletin, vol. 26, No. 3B, Aug. 1993, p. 1566.
"Tailorable Embedded Event Trace ", IBM Technical Disclosure Bulletin, vol. 34, No. 7B, Dec. 1991, pp. 259-261.

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