Microcode control of a parallel architecture microprocessor

Details Microcode control of a parallel architecture microprocessor Microcode control of a parallel architecture microprocessor

1987-06-08

1989-02-07

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 922

Patent

active

048036153

ABSTRACT:
A microprogrammed parallel processor including a plurality of subprocessors operates under the control of microinstructions. Each microinstruction contains a plurality of micro-operations each of which requires one or more subprocessors for execution. All micro-operations for which required subprocessors are available are immediately carried out. Any remaining micro-operations within a microinstruction which are not executed due to lack of subprocessor availability are recycled. These remaining micro-operations are executed in subsequent cycles as a required subprocessor becomes available. The entire microinstruction is not recycled but only those portions of it, i.e., the unexecuted micro-operations, are recycled and executed in a subsequent cycle. The microinstruction being executed is stored in a latch until all micro-operations within the microinstruction are executed. At that time, the next microinstruction is fetched into the latch.

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