Electrical connectors – Preformed panel circuit arrangement – e.g. – pcb – icm – dip,... – With provision to conduct electricity from panel circuit to...
Reexamination Certificate
2000-07-28
2001-11-27
Ta, Tho D. (Department: 2833)
Electrical connectors
Preformed panel circuit arrangement, e.g., pcb, icm, dip,...
With provision to conduct electricity from panel circuit to...
C439S069000, C439S074000
Reexamination Certificate
active
06322374
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is in the field of light to zero insertion force sockets, and in particular relates to a high-density electrical socketing approach based on a combination of micro-fabrication techniques.
2. Description of the Prior Art
Connectors can be thought of as a serviceable attachment of conductor arrays on opposing surfaces of two compatible components. The insertion force requirement and the necessity of aligning many pins fundamentally limit the density of connectors. The present invention addresses primarily the insertion force issue.
Typical pin-based connector assemblies rely on the interference fit of a plug structure containing an array of pins into a receptacle assembly with a matching array of mating socket receptacles for each pin. The act of fitting these pieces together accomplishes two things: (1) a mechanical attachment and (2) a scrubbing action to improve electrical attachment of pins to receptacles. The force requirements for the interference fit clearly scales as the number of pins increase. In extreme cases, electronics packages have been constructed that may feature as many as 1,900 pins. In some cases the compressive force can be hundreds of pounds and in fact attempting to remove such packages can result in the destruction of the associated components that comprise an assembly.
There have been three general responses to the insertion force issue: (1) solder, (2) alternate contact systems, and (3) low insertion force (LIF)/zero insertion force (ZIF) sockets.
Solder assemblies, such as ball grid array (BGA) interface, avoid the insertion force issue altogether by solder attaching the mating conductors of two opposing surfaces. The solder attachment though makes serviceability difficult or impossible.
A second approach involves using a compliant contact system, such as an interposer, to interface identical arrays of flat conductors (no pins or receptacles) on the opposing surfaces. The interposer is a compressible conductor array that is sandwiched between the opposing conductor arrays. The electrical contact is effected by fastening the opposing surfaces together with sufficient force to compress the interposer, ensuring good electrical contact. The compressive force can be as high as about two ounces per contact. Compliance in interposer systems is important due to the need to ameliorate tiny discontinuities (called asperities) in the micro-surfaces of individual conductors that prevent perfect contact over an adequate fraction of the conductor surface areas. Interposers also buffer out-of-plane warpage and expansion due to thermal or mechanically induced stresses. While service-ability is gained with interposers, the significant compressive forces require not only strong fasteners but also bulk reinforcement of the mating assemblies, mitigating any density advantages one could hope for.
LIF and/or ZIF sockets are aimed at high serviceability connection settings, such as the central processor unit of a computer motherboard or as sockets for device programmers that may need dozens or hundreds of mating cycles. In the case of the computer motherboard a high number of contacts are involved (approximately 200), and the value of the inserted component is high but the number of insertions is relatively low. Here, LIF/ZIF sockets minimize the potential of damage to the easily bent pins on the package of the component. In device programmers, components often have much lower pin counts (about 40), but the number of socketing operations may be very high, consistent with programming a number of memory chips for production assemblies. The field of LIF/ZIF sockets continues to evolve, especially with the advent of high pin-count field programmable gate array (FPGA) devices and more complex microprocessors, as these drive the need for serviceable socketing approaches. The LIF/ZIF sockets offer a promising solution for high-value components and provide good connection, but they are very bulky, in some cases bulkier than even the interposer approaches. Furthermore, the pitch (distance between conductors) is fairly coarse (about 100 mils), preventing very dense assemblies to be implemented.
The ideal attributes of a high-performance connector would include: (1) low contact resistance; (2) low pitch (for high pin-count); (3) low insertion force; and (4) easy service-ability. It is possible to have some but not all of these attributes in any of the three basic connection approaches described.
The present invention, a micro-zero insertion force (&mgr;ZIF) socket, combines the best attributes of the three basic connection approaches, with minimal disadvantages. Whereas present ZIF systems employ macro-mechanical approaches and are limited to the 50-100 mil pitch range, the present approach can in principle scale down to the 1-5 mil pitch range, theoretically offering as high as a 10,000:1 density advantage. The system relies on influences from microelectromechanical systems (MEMS) and advanced packaging, though other embodiments are possible.
SUMMARY OF THE INVENTION
The micro-zero insertion force socket (MZIFS) is a high-density electrical socket manufactured using micro-fabrication techniques, a microelectromechanical (MEMS) engage/disengage mechanism, and advanced packaging. Attributes include low contact resistance, low pitch (for high pin count), low insertion force, and easy serviceability. The MZIFS mates conductor arrays on two opposing surfaces, a micro-pin array and a micro-receptor array. The conductor arrays use high density interconnect (HDI) technology to permit convenient access of the mating arrays with the host assemblies.
REFERENCES:
patent: 5372512 (1994-12-01), Wilson et al.
patent: 5454904 (1995-10-01), Ghezzo et al.
patent: 5632631 (1997-05-01), Fjelstad et al.
patent: 6171114 (2001-01-01), Gillette et al.
James C. Lyke, Robert Wojnarowski, Glenn A. Forman, Richard Saia, and Bernard Gorowitz, “Three Dimensional Patterned Overlay High Density Interconnect (HDI) Technology”,Journal of Microelectronic Systems Integration, vol. 1(3), 1993.
Comtois John H.
Lyke James C.
Callahan Kenneth E.
McCamey Ann
Ta Tho D.
The United States of America as represented by the Secretary of
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