Semiconductor device manufacturing: process – Making point contact device
Reexamination Certificate
1999-11-23
2001-05-15
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making point contact device
C324S762010, C324S754090
Reexamination Certificate
active
06232143
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to apparatus for testing semiconductor devices and circuits and, more particularly, to a monolithic probe ring assembly including an integral fine probe point, conductive line and terminal connection for contacting the semiconductor devices and a method construction of the probe ring.
BACKGROUND OF THE INVENTION
In the course of testing semiconductor devices and circuits it becomes necessary to contact and electrically probe the devices and circuits to ascertain their function and determine failure mechanisms. To accomplish this, a finely pointed probe tip or group of finely pointed probe tips is brought into contact with the device or circuit by using pads connected to the device or circuit. As semiconductor devices become smaller and circuits denser, it becomes difficult to make electrical contact with the device with conventional probes, as the probe tips are either too large or too blunt to selectively contact only the intended device or circuit because they have a propensity to contact adjacent structures. Or, the tips are so thin as to bend when contact is attempted and slide off the probe terminal target circuit being tested. When multiple probes are required, it is often not possible to bring the correct number of probe tips close enough to each other because the size of the bodies will physically interfere with one another or will block the view of the target area being tested, thereby making alignment difficult or impossible.
As a result of these problems, pads on semiconductor devices which can number several hundred are often limited by the probe assemblies or probe rings used because of the size of the probe tips. This is especially true in the street or kerf regions between active dies on semiconductor wafers, wherein special test and process monitoring devices and circuits are often fabricated. The actual devices and monitoring structures are often very much smaller than the pads connected to them. A more compact probe assembly would allow smaller pads to be used allowing more devices in the same space or the same number of devices in a smaller space.
Turning to the prior art, a commonly used probe tip is described in U.S. Pat. No. 4,956,923 to Pettingell et al. The probe tip is mounted to a cantilever beam.
U.S. Pat. No. 5,116,462 to Bartha et al. describes a method of fabricating a micro-mechanical cantilever beam with an integral tip using a semiconductor which is reactive ion etch and the an-an-isotropic etch to form molds. Both of these prior art patents are hereby incorporated by reference.
SUMMARY OF THE INVENTION
It is an object of the present invention to overcome the problems encountered in the past by creating an improved probe assembly which includes an integral fine probe point, conductive line and terminal connection for contacting semiconductor devices. The present invention utilizes an an-isotropic wet etching of silicon wafers along crystal planes to produce pyramidal etch pits which are used as molds for the probe points. Points fabricated using this process would be precisely formed. Reactive ion-etching may be used to form the molds when slightly rounded points can be utilized. To provide clearance over the device to be tested, an anisotropic wet etching is used to lower a portion of the silicon surface and the etch pits are formed in this lower surface. Additional semiconductor processes may be used to complete construction of the probe assembly. A conductive layer is deposited and patterned to form an integral probe point, conductive line and terminal connection. A dielectric layer is then deposited and planarized. A support substrate is bonded to the dielectric layer and then reduced. Bonding pads are applied to interconnections made through the support structure, bonding material, and dielectric layer to the terminal portion of the probe assembly. The support structure, bonding material, and dielectric layer are selectively removed in a trench around the conductive layer. Finally the silicon wafer is etched away to free the probe assembly.
Because the tip has such a sharp point, intense electric fields can be generated that make the probe tip ideal for capacitive/inductive coupling to a device to be tested without actually contacting the device. It is therefore another object of the present invention to provide a method and apparatus for non-contact probing of semiconductor devices.
Multi-tipped probe assemblies may be constructed in a like manner, each tip having its own conductive line and terminal connection. Such multi-tipped probe assemblies may be constructed to conform with the size and layout of individual devices such as transistors or circuit lands. The surface of the silicon wafer may be lowered by different amounts in different regions such that the resultant probe points lie in different planes and conform to the topology of the device or structure to be tested.
Therefore it is a further object of the invention to provide a monolithic probe assembly having a plurality of very fine probe points for contacting semiconductor devices to be tested, as well as a method for constructing such a probe assembly.
Through the use of the present invention, probes may be fabricated with the sub-micron dimensions and multi-tipped probe assemblies may be fabricated with dimensions of a few microns.
It is also a further object of the present invention to provide monolithic probe rings or arrays of probes having very fine probe points for contacting semiconductor devices to be tested having test, power, or signal pads and a method of constructing such an array. The pads may be located along the periphery of the chip, dispersed throughout the chip, or especially arranged in the street or kerf regions between active chips on undiced wafers. Since such pads are much larger than individual devices or circuit lands, the probe assemblies made by the method of the present invention for this purpose are proportionally larger, though the conductive lines need not be. Therefore, additional conductive and dielectric layers may be formed below and above the conductive line portion of the probe assembly, effectively providing for coaxial and triaxial wiring up to the probe point.
It is another object of the present invention to provide a probe ring assembly which includes probes having conductive shielding surrounding a central conductor which is integral to the probe point and terminal connection and a method for constructing such a ring assembly.
REFERENCES:
patent: 3731191 (1973-05-01), Bullard et al.
patent: 4801866 (1989-01-01), Wixley
patent: 4956923 (1990-09-01), Pettingell et al.
patent: 5116462 (1992-05-01), Bartha et al.
patent: 5202623 (1993-04-01), LePage
patent: 5406209 (1995-04-01), Johnson et al.
patent: 5471458 (1995-11-01), Oguchi et al.
patent: 5953306 (1999-09-01), Yi
patent: 6059982 (2000-05-01), Palagonia et al.
Maddix John Thomas
Palagonia Anthony Michael
Pikna Paul Joseph
Vallett David Paul
International Business Machines - Corporation
Rocchegiani Renzo N.
Smith Matthew
Walsh Robert A.
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