Micro-power gain lattice

Details Micro-power gain lattice Micro-power gain lattice

1990-11-19

1991-08-20

Mullins, James B.

Amplifiers

With semiconductor amplifying device

Including plural stages cascaded

330296, 330293, H03F 342

Patent

active

050417975

ABSTRACT:
A broadband, high-gain RF signal amplifier which consumes a minimal amount of DC power has an input terminal to which an input signal to be amplified is coupled, and an output terminal from which an amplified output signal is derived. The signal amplifier has a plurality of first through n.sup.th signal amplification stages coupled in cascade between the input terminal and the output terminal. Each stage comprises an amplifier device having an input electrode, an output electrode and a control electrode. The output electrode is coupled to an amplifier device of an i.sup.th stage that is resistively coupled to the input electrode of the amplifier device of an (i+1).sup.th stage, and is DC coupled through a rectifier device to the control electrode of the amplifier device of the (i+1).sup.th stage. The control electrode of the amplifier device of the i.sup.th stage is resistively coupled to the input electrode of the amplifier device of the (i+1).sup.th stage. The input terminal is coupled to the input electrode of the amplifier device of the first amplification stage, while the output terminal is coupled to the input electrode of the amplifier device of the n.sup.th amplification stage.

REFERENCES:
patent: 3983503 (1976-09-01), Bannister et al.

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