Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type
Reexamination Certificate
2001-08-29
2003-10-14
Reichard, Dean A. (Department: 2831)
Electricity: conductors and insulators
Boxes and housings
Hermetic sealed envelope type
C361S767000, C257S734000, C257S780000, C174S050510
Reexamination Certificate
active
06632996
ABSTRACT:
The present application claims priority under 35 U.S.C. §119 to Korean Application No. 2000-60706, which is hereby incorporated by reference in its entirety for all purposes.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a package type in which an integrated circuit of a semiconductor chip faces down, and more particularly, to a micro-ball grid array (BGA) package tape which is adapted to test a chip using a micro-BGA package tape.
2. Description of the Related Art
In many wireless devices such as competitively developing cellular phones, camcorders, and memory cards, demands for large system storage capacity and high-speed operation are on the increase. For example, as the speed of CPUs of PCs increases, large storage capacities and high speed operations of memory devices are required.
To overcome this problem, new memory technologies are being developed, an example of which is a recently developed Rambus DRAM (RDRAM). While maximizing the performance of memory devices, various semiconductor packaging technologies that offer high quality and high reliability are developed so as to prevent the performance of high-speed, large-capacity devices from decreasing. A representative example thereof is a chip scale package (CSP), and most semiconductor manufacturers tend to announce CSP products as their own brand name.
CSPs have two chief advantages: one is to keep the size and weight of the package to a minimum, and the other is to allow a high speed operation by low inductance. Among those CSPs, a micro-BGA developed by Tessera, Inc., is a real chip size package. The micro-BGA packages can reduce the size and weight of the package to about a third compared to conventional packages. Furthermore, they are advantageous in significantly relieving stresses by their unique structures. Currently, high-speed RDRAMs employ the micro-BGA package.
FIG. 1
shows a conventional packaging method. The conventional packaging method involves encapsulating a chip
100
, on which a circuit
110
is embedded, in molding compounds
120
and connecting the encapsulated chip
100
to sockets
140
using pins
130
.
FIG. 2
shows a micro-BGA packaging method. Referring to
FIG. 2
, a chip
200
, on which a circuit
210
is embedded, is attached to one surface of a tape
220
by an adhesive (not shown), and conductive metal patterns (not shown) for beam lead bonding formed in the tape
220
itself are beam lead bonded to bonding pads (not shown) of the chip
200
. Solder balls
230
are attached to the other surface of the tape
200
and connected to corresponding sockets
240
. Here, the tape
220
is an insulating film of a polyimide material.
As shown in
FIG. 2
, there is a difference between the conventional packaging method and the micro-BGA packaging method. That is, an adhesive such as elastomer or a polyimide-based organic substrate is used instead of a leadframe which forms the framework of the conventional package, and solder balls and solder bumps are used as an external connection terminal instead of pins. Thus, the micro-BGA package can provide for further increased mounting density during a process of mounting a chip and other components on a printed circuit board (PCB).
However, in most semiconductor chips, monitoring pads such as a DC check pad and test mode pads, other than control pads, data pads and power pads, are not wire bonded. Thus, in order to check whether semiconductor chips assembled by the conventional packaging method are defective or not, a semiconductor package in operation is de-capped and then probing is directly performed on a pad to be tested, to measure the electric characteristics such as a DC level. In the conventional packaging method, since the circuit
110
of the semiconductor chip
100
is assembled so as to face upward, actual probing is allowed after de-capping the package.
However, since the micro-BGA package is assembled such that the circuit
210
of the semiconductor chip
200
faces down, it is impossible to perform probing even after decapping the package.
SUMMARY OF THE INVENTION
The present invention is therefore directed to a micro-ball grid array package tape including a tap for testing, which substantially overcomes one or more of the problems due to the limitations and disadvantages of the related art.
To solve the above problems, it is an object of the present invention to provide a package tape for easily checking the electric characteristics of a semiconductor chip.
Accordingly, to achieve the above and other objects, the present invention provides a package tape for testing a chip assembled by a micro-ball grid array (BGA) packaging method. The package tape includes one or more taps, disposed on a guard area other than an area where a semiconductor chip is attached, for testing the semiconductor chip; one or more pads, disposed on the area where the semiconductor chip is attached, and attached to corresponding test pads on the semiconductor chip; and one or more leads which electrically connect the taps with the pads.
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.
REFERENCES:
patent: 5892277 (1999-04-01), Ikemizu et al.
patent: 6320136 (2001-11-01), Sakamoto
patent: 6320267 (2001-11-01), Yukawa
patent: 6329606 (2001-12-01), Freyman et al.
patent: 8070024 (1996-03-01), None
Reichard Dean A.
Volentine & Francos, PLLC
Walkenhorst W. David
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