Fishing – trapping – and vermin destroying
Patent
1992-12-16
1994-02-08
Fourson, George
Fishing, trapping, and vermin destroying
437914, 437966, 437974, 148DIG12, 156630, H01L 21302
Patent
active
052848035
ABSTRACT:
A method of manufacturing a semiconductor body (1), whereby a carrier wafer (2) with an optically smooth main surface (3) is provided with a semiconducting top layer (4) in that the main surface (3) is brought into contact with an optically smooth main surface (5) of a monocrystalline semiconductor wafer (6), a permanent bond being formed, after which the semiconductor wafer (6) is made thin by means of a grinding process and a polishing process in that order. The semiconductor wafer (6) is made thin in the polishing process in that the exposed main surface (9) of the carrier wafer (2) is made wear-resistant, and in that then the carrier wafer (2) bonded to the semiconductor wafer (6) is arranged between two plane polishing discs (10) and (11) provided with a polishing liquid, upon which these polishing discs (10, 11) and the exposed main surfaces (8, 9) are moved relative to one another. It is achieved by this that a semiconductor body (1) with a carrier wafer (2) and a top layer (4) can be manufactured in a simple manner suitable for mass production. It is also found that a top layer (4) with smaller layer thickness variations can be manufactured.
REFERENCES:
patent: 4880684 (1989-11-01), Boss et al.
Haisma, J. et al, "Silicon On Insulator . . . Evaluations", Japanese J. Appl. Phys. vol. 28, No. 8 (1989) pp. 1426-1443.
Haisma Jan
Van Der Kruis Franciscus J. H. M.
Biren Steven R.
Fourson George
U.S. Philips Corporation
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