Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Layout editor
Reexamination Certificate
2011-05-24
2011-05-24
Lin, Sun J (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Layout editor
C716S119000
Reexamination Certificate
active
07949989
ABSTRACT:
Systems and computer program products for layout device matching driven by a schematic editor. Exemplary embodiments include identifying a master device in a circuit layout having at least transistors, the master device having property values including at least one of topology, name and device-type, identifying a cloned device linked to the master device, automatically propagating the property values to the cloned device, making changes to a design layout of the master device, including a change to the properties, and automatically propagating the changes to the design layout and the change to the properties of the master device to the cloned device.
REFERENCES:
patent: 6762757 (2004-07-01), Sander et al.
patent: 6768486 (2004-07-01), Szabo et al.
patent: 7275063 (2007-09-01), Horn
patent: 7555739 (2009-06-01), Ginetti et al.
Ladin Karl L.
Unterborn Erik S.
Cantor & Colburn LLP
International Business Machines - Corporation
Lin Sun J
LandOfFree
Methods, systems and computer program products for layout... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods, systems and computer program products for layout..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods, systems and computer program products for layout... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2670833