Semiconductor device manufacturing: process – Having diamond semiconductor component
Reexamination Certificate
2006-11-21
2006-11-21
Crane, Sara (Department: 2811)
Semiconductor device manufacturing: process
Having diamond semiconductor component
C438S931000
Reexamination Certificate
active
07138291
ABSTRACT:
A method is disclosed for treating a silicon carbide substrate for improved epitaxial deposition thereon and for use as a precursor in the manufacture of devices such as light emitting diodes. The method includes the steps of implanting dopant atoms of a first conductivity type into the first surface of a conductive silicon carbide wafer having the same conductivity type as the implanting ions at one or more predetermined dopant concentrations and implant energies to form a dopant profile, annealing the implanted wafer, and growing an epitaxial layer on the implanted first surface of the wafer.
REFERENCES:
patent: 3629011 (1971-12-01), Tohi et al.
patent: 5273933 (1993-12-01), Hatano et al.
patent: 5523589 (1996-06-01), Edmond et al.
patent: 5786606 (1998-07-01), Nishio et al.
patent: 5900647 (1999-05-01), Inoguchi
patent: 6120600 (2000-09-01), Edmond et al.
patent: 6187606 (2001-02-01), Edmond et al.
patent: 6232244 (2001-05-01), Ibok
patent: 6277707 (2001-08-01), Lee et al.
patent: 6552376 (2003-04-01), Koike et al.
patent: 6555452 (2003-04-01), Nikolaev et al.
patent: 6632694 (2003-10-01), Torvik
patent: 6667495 (2003-12-01), Friedrichs et al.
patent: 2002/0031851 (2002-03-01), Linthicum et al.
patent: 2003/0006417 (2003-01-01), Klosowiak et al.
patent: 199 44 144 (2001-04-01), None
patent: WO 00/79570 (2000-12-01), None
F. J. Campos et al.; Confocal Micro-Raman Characterization of Lattice Damage in HighEnergy Aluminum Implanted 6H-SIC; Journal of Applied Physics; Jan. 1, 1999; pp. 99-104; vol. 85, No. 1; American Institute of Physics, New York, US.
M.B. Scott et al.; High temperature (500 degrees C) implantation study of P+ and N+ implanted epitaxial N-type 4H-SIC; Compound Semiconductors 1998, Proceedings of the 25th International Symposium on Compound Semiconductors; Nara, Japan, Oct. 12-16, 1998; pp. 763-768; vol. NR. 162; Institute of Physics Conference Series, London.
Issey Ohta et al.; An Ideal-Profile Implantation Process for GaAs Analog MMICs; Proceedings of the Gallium Arsenide Integrated Circuit Symposium, Grenelefe, Florida, Oct. 28-30, 1986; pp. 55-58; vol. SYMP. 8; IEEE, New York, US.
W.M. Duncan et al.; A Single Step Selective Implantation Technology for Multiply Doped Layers Using Proximity Annealing; IEEE Electron Device Letters; Dec. 1981; pp. 309-311; vol. EDL-2, No. 12; IEEE Inc., New York, US.
H. J. Hovel; Implant Profile Adjustment with GaA1As Caps; IBM Technical Disclosure Bulletin; Feb. 1985; pp. 5360-5361; vol. 27, No. 9; IBM Corp., New York, US.
S.K. Lee; Electrical characterization of TIC ohmic contacts to aluminum ion implanted 4H-silicon carbide; Applied Physics Letters; Sep. 4, 2000; pp. 1478-180; vol. 77, No. 10.
Edmond John Adam
McClure Davis Andrew
Slater, Jr. David Beardsley
Suvorov Alexander
Crane Sara
Cree Inc.
Summa, Allan & Addition, P.A.
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