Pulse or digital communications – Systems using alternating or pulsating current – Plural channels for transmission of a single pulse train
Reexamination Certificate
1998-05-29
2001-03-20
Pham, Chi (Department: 2631)
Pulse or digital communications
Systems using alternating or pulsating current
Plural channels for transmission of a single pulse train
C375S327000, C375S344000, C375S346000, C455S312000
Reexamination Certificate
active
06205183
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of communications, and more particularly to receivers and methods for reducing reception sensitivity for crystal controlled receivers.
BACKGROUND OF THE INVENTION
In the field of radio receivers, there has been a concentrated effort to reduce the amount of tuned circuitry used in the receivers. By reducing the number of tuned circuits, large portions of the receiver can be integrated resulting in smaller receivers. These compact receivers can then be used in many areas such as cellular telephones. A major advance in the design of such receivers is a technique known as the “zero-IF” technique.
Slope, drift, and offset compensation in zero-IF receivers is discussed, for example, in U.S. Pat. No. 5,568,520 entitled “Slope Drift and Offset Compensation In Zero-IF Receivers”. In addition, U.S. Pat. No. 5,241,702 entitled “Slope Drift And Offset Compensation In Zero-IF Receivers” discusses reducing DC offset in homodyne (zero-IF) receivers by differentiating the I,Q signals before digitization using an analog differentiating circuit, and then re-integrating the signal samples numerically after digitization to restore the signal's undifferentiated waveform. Each of these patents is hereby incorporated herein in its entirety by reference. Furthermore, the inventor of the present invention is an inventor in each of these patents.
In homodyne receivers, received signals are converted directly down to zero frequency I and Q signals, also called the quadrature baseband, by mixing the received signal against a local oscillator placed in the center of the desired receive channel. Since the local oscillator is directly on top of the received signal, it may be a significant source of interference to reception. Because the interfering signal may be the same as the downconversion oscillator, however, it is coherent interference and appears as DC offset on the I,Q outputs. This DC offset can be much larger than the weakest signal that the receiver is desired to receive and can drive the I,Q Analog-to-Digital convertors to full scale or beyond, causing signal degradation.
The patents discussed above thus provide ways to reduce DC offset of the I,Q signals to reduce interference from a local oscillator within a homodyne receiver. In known homodyne receivers, the local oscillator frequency may be the dominant crystal-related interfering signal because the local oscillator is tuned to the channel frequency by means of a digital frequency synthesizer using the crystal as a reference.
These patents, however, may not resolve problems relating to superhetrodyne receivers wherein received signals are mixed with a local oscillator that is not tuned to the channel frequency but that is tuned to the channel frequency plus or minus a constant offset equal to the desired first intermediate frequency. In such a system, the local oscillator may not be a significant source of interference to a desired signal and the problem of DC offset in I and Q signals may not be evident or obvious.
Interference to a desired signal by other crystal related frequencies such as crystal harmonics, however, may also contribute to the DC offset in the I and Q signals. Accordingly, there continues to exist a need in the art for improved receivers and methods of reducing interference.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide improved receivers and methods.
It is another object of the present invention to provide receivers with reduced interference and related methods.
These and other objects are provided according to the present invention by a receiver including a reference frequency generator, a downconverter, an analog-to-digital converter such as a phase digitizer, and a processor wherein the downconverter and analog-to-digital converter are both synchronized to a common reference frequency signal generated by the reference frequency generator. More particularly, the downconverter downconverts received signals to provide intermediate frequency signals, and the analog-to-digital converter generates a plurality of complex numbers representative of the received signals including interference components responsive to the intermediate frequency signals. In addition, the processor processes the complex numbers to obtain desired signaling information.
Systematic frequency errors introduced by the analog-to-digital conversion process can thereby be reduced by processing the digitized signal samples. Furthermore, when the receiver is tuned to a frequency channel that is a harmonic of the crystal of the reference frequency generator, the crystal related interference can be reduced using, for example, a digital high-pass filter or averaging to discriminate constant error components.
More particularly, a receiver according to an embodiment of the present invention is tunable to a plurality of frequency channels. The receiver includes a reference frequency generator, a downconverter, an analog-to-digital converter, and a processor. The reference frequency generator generates a reference frequency signal, and the downconverter downconverts received signals to provide intermediate frequency signals wherein the down converter is synchronized to the reference frequency signal. The analog-to-digital converter generates a plurality of complex numbers representative of the received signals including interference components related to the reference frequency signal wherein the analog-to-digital converter is synchronized to the reference frequency signal. The processor estimates an origin point for the plurality of complex numbers and subtracts the origin point from each of the complex numbers thereby producing interference-compensated complex numbers representative of the received signals with reduced internally generated interference. The processor also processes the interference-compensated complex numbers to obtain desired signaling information.
In particular, the downconverter can include a local oscillator synchronized to the reference frequency signal, first and second mixers driven by the oscillator, and a combining network so that the received signals are provided to the first and second mixers, the outputs of which are combined in the combining network to provide the intermediate frequency signals. The reference frequency generator can include a reference frequency oscillator. Moreover, the received signals can be received at an antenna, and a filter can be serially coupled with the downconverter between the antenna and the analog-to-digital converter. In addition, an amplifier can be serially coupled with the downconverter between the antenna and the analog-to-digital converter, and the estimated origin point can include an ‘x’ coordinate Io and a ‘y’ coordinate Qo.
The receiver can also include a digital frequency synthesizer coupled with the reference frequency generator so that the receiver is tuned to channel frequencies that are related to the reference frequency by a ratio of two integers. Moreover, the analog-to-digital converter can employ quadrature downconversion to analog I and Q signals followed by analog-to-digital conversion of each of said I and Q signals. Alternately, the analog-to-digital converter can convert the intermediate frequency signals to pairs of values representative of instantaneous signal phase and instantaneous signal amplitude, or the analog-to-digital converter can perform quadrature sampling of the intermediate frequency signal.
The plurality of complex numbers can include compensation for systematic frequency error in the receiver, and the estimated origin point can be estimated from a mean of real components of the plurality of complex numbers and from a mean of imaginary components of the plurality of complex numbers. In addition, the origin point can be estimated by estimating a center of one of a circle and an arc on which the plurality of complex numbers are expected to lie, or by using a known signal pattern included in the received signals. The estimated origin point can also be re-e
Ericsson Inc.
Myers Bigel & Sibley & Sajovec
Pham Chi
Phu Phuong
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