Patent
1998-01-15
2000-02-01
Teska, Kevin J.
39550005, G06F 1900
Patent
active
060212713
ABSTRACT:
A simulation input and a model file are generated. The simulation input file is processed to generate object code, entries, line counts, and comment lines. A simulation program is run that uses the object code, entries, line counts, and input comment lines. A machine captures and links output comment lines with their associated test vectors by using the entries and line counts to form a simulation results file. After the simulation, the simulation results file can be reviewed. After simulation, masks (30, 40, 50, 60, 70) are generated that are used to form integrated circuits (20). The present invention can also be used for testing integrated circuits. The test methods use a test input file generated from the simulation results file.
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Lindquist Steven P.
Tumin Kenneth P.
Winter Marlan L.
Choi Kyle J.
Motorola Inc.
Teska Kevin J.
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