Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2009-01-12
2011-11-08
Nguyen, Thanh (Department: 2893)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S758000, C257SE21211
Reexamination Certificate
active
08053328
ABSTRACT:
A method for depositing fine particles from a suspension on selected regions of a substrate is disclosed. The particles are deposited on selected regions of a clean hydrophobic semiconductor surface that are surrounded by a wetting boundary which includes a mesa formed by etching through a silicon-on-insulator (SOI) film and an underlying buried oxide of an SOI substrate. The process is well suited for the growth of semiconductor nanowires that nucleates from fine particle used as a catalyst.
REFERENCES:
patent: 6310362 (2001-10-01), Takemura
patent: 7476573 (2009-01-01), Cohen
patent: 2002/0123227 (2002-09-01), Winningham et al.
patent: 2003/0211681 (2003-11-01), Hanafi et al.
Alexanian Vazken
International Business Machines - Corporation
Nguyen Thanh
Scully , Scott, Murphy & Presser, P.C.
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