Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates
Reexamination Certificate
2005-02-22
2005-02-22
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
C438S458000
Reexamination Certificate
active
06858517
ABSTRACT:
The present invention relates to a method for forming a heterogeneous assembly of first and second materials having different coefficients of thermal expansion. The method includes bonding a surface of a first substrate of a first material to a surface of a second substrate of a second material wherein the first substrate includes a zone of weakness therein to define a transfer layer adjacent the first surface, providing a stiffening substrate of a third material to maintain sufficient flatness and prevent breakage of the transfer layer during detachment from the first substrate, and detaching the transfer layer from the first substrate along the zone of weakness to form a heterogeneous assembly of the transfer layer and second substrate. The stiffening substrate is bonded to one of the first or second substrates and the third material has a coefficient of thermal expansion that is the same as or close to that of the material of the substrate to which the stiffening substrate is bonded to facilitate a successful detachment of the transfer layer from the first substrate.
REFERENCES:
patent: 5391257 (1995-02-01), Sullivan et al.
patent: 5395788 (1995-03-01), Abe et al.
patent: 5863830 (1999-01-01), Bruel et al.
patent: 6429094 (2002-08-01), Maleville et al.
patent: 6774010 (2004-08-01), Chu et al.
patent: 20010019153 (2001-09-01), Sato et al.
patent: 20010026997 (2001-10-01), Henley et al.
patent: 20020157790 (2002-10-01), Abe et al.
patent: 20030022463 (2003-01-01), Zheng
patent: 20030104678 (2003-06-01), Kelly et al.
patent: 20030129780 (2003-07-01), Auberton-Herve
patent: 20040121557 (2004-06-01), Ghyselen
patent: 20040121558 (2004-06-01), Letertre et al.
patent: 20040166649 (2004-08-01), Bressot et al.
patent: 0 703 609 (1996-03-01), None
patent: 0 767 486 (1997-04-01), None
patent: 1 189 285 (2002-03-01), None
Boussagol Alice
Martinez Muriel
Ghyka Alexander
S.O.I. Tec Silicon on Insulator Technologies S.A.
Winston & Strawn LLP
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