Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2005-09-13
2005-09-13
Quach, T. N. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S737000, C257S758000, C257S780000
Reexamination Certificate
active
06943440
ABSTRACT:
A process flow to make an interconnect structure with one or more thick metal layers under Controlled Collapse Chip Connection (C4) bumps at a die or wafer level. The interconnect structure may be used in a backend interconnect of a microprocessor. The process flow may include forming an inter-layer dielectric with spray coating or lamination over a surface with high aspect ratio structures.
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George Anna M.
Kim Sarah E.
Lee Kevin J.
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Intel Corporation
Quach T. N.
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