Methods of processing substrates based upon substrate...

Details Methods of processing substrates based upon substrate... Methods of processing substrates based upon substrate...

2002-11-01

2004-08-17

Gandhi, Jayprakash N. (Department: 2125)

Data processing: generic control systems or specific application

Specific application, apparatus or process

Product assembly or manufacturing

C700S095000, C700S117000, C438S005000, C029S599000

Reexamination Certificate

active

06778876

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor fabrication technology, and, more particularly, to various methods of processing substrates based upon substrate orientation.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the operating performance of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for computers and electronic devices that operate at increasingly greater speeds. This demand for increased speed has resulted in a continual reduction in the size of semiconductor devices, e.g., transistors. That is, many components of a typical field effect transistor (FET), e.g., channel length, junction depths, gate insulation thickness, and the like, are reduced. For example, all other things being equal, the smaller the channel length of the transistor, the faster the transistor will operate. Thus, there is a constant drive to reduce the size, or scale, of the components of a typical transistor to increase the overall speed of the transistor, as well as integrated circuit devices incorporating such transistors. Moreover, the density of such transistors on a wafer per unit area has dramatically increased as a result of, among other things, the reduction in feature sizes, and an overall desire to minimize the size of various integrated circuit products.
By way of background, an illustrative field effect transistor
10
, as shown in
FIG. 1
, may be formed above a surface
15
of a semiconducting substrate or wafer
11
comprised of doped-silicon. The substrate
11
may be doped with either N-type or P-type dopant materials. The transistor
10
may have a doped polycrystalline silicon (polysilicon) gate electrode
14
formed above a gate insulation layer
16
. The gate electrode
14
and the gate insulation layer
16
may be separated from doped source/drain regions
22
of the transistor
10
by a dielectric sidewall spacer
20
. The source/drain regions
22
for the transistor
10
may be formed by performing one or more ion implantation processes to introduce dopant atoms, e.g., arsenic or phosphorous for NMOS devices, boron for PMOS devices, into the substrate
11
. Shallow trench isolation regions
18
may be provided to isolate the transistor
10
electrically from neighboring semiconductor devices, such as other transistors (not shown). Additionally, although not depicted in
FIG. 1
, a typical integrated circuit device is comprised of a plurality of conductive interconnections, such as conductive lines and conductive contacts or vias, positioned in multiple layers of insulating material formed above the substrate. These conductive interconnections allow electrical signals to propagate between the transistors
10
formed above the substrate
11
.
The gate electrode
14
has a critical dimension
12
, i.e., the width of the gate electrode
14
, that approximately corresponds to the channel length
13
of the device when the transistor
10
is operational. Of course, the critical dimension
12
of the gate electrode
14
is but one example of a feature that must be formed very accurately in modern semiconductor manufacturing operations. Other examples include, but are not limited to, conductive lines, openings in insulating layers to allow subsequent formation of a conductive interconnection, i.e., a conductive line or contact, therein, etc.
In the process of forming integrated circuit devices, millions of transistors, such as the illustrative transistor
10
depicted in
FIG. 1
, are formed above the semiconducting substrate
11
. In general, semiconductor manufacturing operations involve, among other things, the formation of layers of various materials, e.g., polysilicon, metals, insulating materials, etc., and the selective removal of portions of those layers by performing known photolithographic and etching techniques. Semiconductor fabrication also involves performing various ion implantation processes to form various doped regions in the semiconducting substrate, performing various heat treatment processes, performing chemical mechanical polishing operations to planarize a surface, and performing various intermediate metrology operations to determine the accuracy of the manufacturing process. These processes are continued until such time as the integrated circuit device is complete.
Manufacturing integrated circuit products is a very complex process and it requires an extremely clean environment. Many different process steps may be performed to manufacture an integrated circuit. For example, 400-600 separate steps may be performed to complete the manufacture of a microprocessor. Such steps may involve, among other things, depositing a layer of material (deposition), forming a patterned photoresist layer above the deposited layer (photo), etching the deposited layer using the patterned photoresist layer as a mask (etch), and removing the patterned photoresist mask after the etch process is complete. The four recited steps are a very small portion of an overall process flow that is used to create an integrated circuit product. The number and combination of steps used to manufacture an integrated circuit product is determined by the nature and construction of the integrated circuit product. There is virtually an infinite variety of ways in which the various semiconductor manufacturing processes may be performed to create the final integrated circuit product. The various process operations are performed level-by-level until such time as the integrated circuit product is complete.
Despite great efforts to avoid them, a variety of different types of defects may be formed on an integrated circuit product during the course of manufacturing. For example, defects may include airborne particles, residual materials from previous process layers or operations, etc. Certain defects may be the result of improper processing, e.g., bridging between adjacent lines due to incomplete etching, etc. These defects may occur at any level of an integrated circuit product. Controlling the number, type and size of defects in modern integrated circuit manufacturing is a very important aspect of manufacturing operations. With today's sophisticated integrated circuit products with reduced feature sizes, even small levels of defects can severely degrade device performance or, in some cases, render integrated circuit products useless. Despite these efforts, defects still occur in semiconductor manufacturing due to the complexity of the processes used and the density and feature sizes of the devices that are formed. It is typically of interest to determine, among other things, the existence of defects and the defect density on an integrated circuit product as soon as possible so that various decisions may be made and various actions may be taken.
Additionally, the manufacture of integrated circuit products is a very competitive business. Manufacturers are under constant pressure to increase the yield of useful integrated circuit products that meet desired performance characteristics. For example, after an integrated circuit product is formed, it may be subjected to one or more electrical performance tests that are sometimes referred to as wafer electrical tests (WET). Such tests may include, for example, switching speeds, power consumption, etc. The completed integrated circuit products may be sorted based upon the results of the electrical tests. That is, for example, higher-performing parts may be separated from lower-performing parts and sold at higher prices due to their enhanced performance ability. Thus, it is critically important that yields in general be maximized in manufacturing integrated circuit products and, more particularly, that the production of higher-performing devices be increased.
The present invention is directed to various methods and systems that may solve, or at least reduce, some or all of the aforementioned problems.
SUMMARY OF THE INVENTION
The present invention is generally directed t

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